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From: "Wei Hu (Xavier)" <xavier.huwei@huawei.com>
To: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>,
	"dev@dpdk.org" <dev@dpdk.org>
Cc: nd <nd@arm.com>, Ruifeng Wang <Ruifeng.Wang@arm.com>,
	"Wei Hu (Xavier)" <xavier.huwei@huawei.com>
Subject: Re: [dpdk-dev] [PATCH] lib/librte_eal: support SVE flag on ARM64
Date: Sat, 18 Jul 2020 10:17:38 +0800
Message-ID: <a6662d13-faf7-3de5-ec16-150baa6b8472@huawei.com> (raw)
In-Reply-To: <DB6PR0802MB221607306D0B99D742E4524F987C0@DB6PR0802MB2216.eurprd08.prod.outlook.com>

Hi, Honnappa Nagarahalli


On 2020/7/18 7:04, Honnappa Nagarahalli wrote:
> Hi,
> 	Thanks for the patch. Has this been tested on any platform (simulator, emulator etc)? Do you plan to add more code using SVE?
We have tested it on FPGA board and will upstream some code using SVE later.

Thanks, Xavier
> Thank you,
> Honnappa
>
>> -----Original Message-----
>> From: dev <dev-bounces@dpdk.org> On Behalf Of Wei Hu (Xavier)
>> Sent: Friday, July 17, 2020 7:08 AM
>> To: dev@dpdk.org
>> Cc: xavier.huwei@huawei.com
>> Subject: [dpdk-dev] [PATCH] lib/librte_eal: support SVE flag on ARM64
>>
>> From: Chengwen Feng <fengchengwen@huawei.com>
>>
>> SVE is the next-generation SIMD extension of the ARMv8-A AArch64
>> instruction set.
>> The related marco definition can be found in linux kernel:
>>    arch/arm64/include/uapi/asm/hwcap.h
>>
>> This patch supports getting cpu SVE feature on ARM64 platform.
>>
>> Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
>> Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
>> ---
>>   lib/librte_eal/arm/include/rte_cpuflags_64.h | 1 +
>>   lib/librte_eal/arm/rte_cpuflags.c            | 1 +
>>   2 files changed, 2 insertions(+)
>>
>> diff --git a/lib/librte_eal/arm/include/rte_cpuflags_64.h
>> b/lib/librte_eal/arm/include/rte_cpuflags_64.h
>> index 95cc014..069844d 100644
>> --- a/lib/librte_eal/arm/include/rte_cpuflags_64.h
>> +++ b/lib/librte_eal/arm/include/rte_cpuflags_64.h
>> @@ -22,6 +22,7 @@ enum rte_cpu_flag_t {
>>   	RTE_CPUFLAG_SHA2,
>>   	RTE_CPUFLAG_CRC32,
>>   	RTE_CPUFLAG_ATOMICS,
>> +	RTE_CPUFLAG_SVE,
>>   	RTE_CPUFLAG_AARCH64,
>>   	/* The last item */
>>   	RTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */ diff
>> --git a/lib/librte_eal/arm/rte_cpuflags.c b/lib/librte_eal/arm/rte_cpuflags.c
>> index caf3dc8..b1e220b 100644
>> --- a/lib/librte_eal/arm/rte_cpuflags.c
>> +++ b/lib/librte_eal/arm/rte_cpuflags.c
>> @@ -95,6 +95,7 @@ const struct feature_entry rte_cpu_feature_table[] = {
>>   	FEAT_DEF(SHA2,		REG_HWCAP,    6)
>>   	FEAT_DEF(CRC32,		REG_HWCAP,    7)
>>   	FEAT_DEF(ATOMICS,	REG_HWCAP,    8)
>> +	FEAT_DEF(SVE,		REG_HWCAP,    22)
>>   	FEAT_DEF(AARCH64,	REG_PLATFORM, 1)
>>   };
>>   #endif /* RTE_ARCH */
>> --
>> 2.7.4
>


  reply	other threads:[~2020-07-18  2:17 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-17 12:08 Wei Hu (Xavier)
2020-07-17 23:04 ` Honnappa Nagarahalli
2020-07-18  2:17   ` Wei Hu (Xavier) [this message]
2020-07-22  6:35     ` Ruifeng Wang
2020-08-17 12:43       ` Wei Hu (Xavier)

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