From: Ferruh Yigit <ferruh.yigit@intel.com>
To: "谢华伟(此时此刻)" <huawei.xhw@alibaba-inc.com>, maxime.coquelin@redhat.com
Cc: dev@dpdk.org, david.marchand@redhat.com,
anatoly.burakov@intel.com, xuemingl@nvidia.com, grive@u256.net,
chenbo.xia@intel.com
Subject: Re: [dpdk-dev] [PATCH v6 2/2] bus/pci: support MMIO in PCI ioport accessors
Date: Tue, 9 Feb 2021 14:51:01 +0000 [thread overview]
Message-ID: <a80ae590-5f1b-72b6-e56a-d2526b744b58@intel.com> (raw)
In-Reply-To: <1611890309-99135-3-git-send-email-huawei.xhw@alibaba-inc.com>
On 1/29/2021 3:18 AM, 谢华伟(此时此刻) wrote:
> From: "huawei.xhw" <huawei.xhw@alibaba-inc.com>
>
> With IO BAR, we get PIO(programmed IO) address.
> With MMIO BAR, we get mapped virtual address.
> We distinguish PIO(Programmed IO) and MMIO(memory mapped IO) by their address like how kernel does.
> ioread/write8/16/32 is provided to access PIO/MMIO.
> By the way, for virtio on arch other than x86, BAR flag indicates PIO but is mapped.
>
> Signed-off-by: huawei xie <huawei.xhw@alibaba-inc.com>
> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
<...>
> +static inline void iowrite8(uint8_t val, void *addr)
> +{
> + (uint64_t)(uintptr_t)addr >= PIO_MAX ?
> + *(volatile uint8_t *)addr = val :
> + outb(val, (unsigned long)addr);
Is the 'outb_p' to 'outb' conversion intentional? And if so why?
Same of the all 'outb_p', 'outw_p', 'outl_p'.
<...>
> size = 1;
> -#if defined(RTE_ARCH_X86)
> - outb_p(*s, reg);
> -#else
> - *(volatile uint8_t *)reg = *s;
> -#endif
> + iowrite8(*s, (void *)reg);
> }
> }
> }
>
next prev parent reply other threads:[~2021-02-09 14:51 UTC|newest]
Thread overview: 61+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-29 3:18 [dpdk-dev] [PATCH v6 0/2] support both PIO and MMIO BAR for legacy device in virtio PMD 谢华伟(此时此刻)
2021-01-29 3:18 ` [dpdk-dev] [PATCH v6 1/2] bus/pci: use PCI standard sysfs entry to get PIO address 谢华伟(此时此刻)
2021-02-03 9:37 ` Maxime Coquelin
2021-02-18 9:33 ` David Marchand
2021-02-21 15:58 ` 谢华伟(此时此刻)
2021-02-24 12:49 ` David Marchand
2021-02-24 15:29 ` 谢华伟(此时此刻)
2021-02-24 17:52 ` David Marchand
2021-03-01 15:47 ` 谢华伟(此时此刻)
2021-03-02 12:31 ` 谢华伟(此时此刻)
2021-01-29 3:18 ` [dpdk-dev] [PATCH v6 2/2] bus/pci: support MMIO in PCI ioport accessors 谢华伟(此时此刻)
2021-02-03 9:37 ` Maxime Coquelin
2021-02-09 14:51 ` Ferruh Yigit [this message]
2021-02-19 8:52 ` Ferruh Yigit
2021-02-21 15:45 ` 谢华伟(此时此刻)
2021-02-17 9:06 ` David Marchand
2021-02-17 14:15 ` 谢华伟(此时此刻)
2021-02-18 9:33 ` David Marchand
2021-01-29 3:25 ` [dpdk-dev] [PATCH v6 0/2] support both PIO and MMIO BAR for legacy device in virtio PMD 谢华伟(此时此刻)
2021-02-01 7:43 ` 谢华伟(此时此刻)
2021-02-03 9:37 ` Maxime Coquelin
2021-02-04 2:50 ` 谢华伟(此时此刻)
2021-02-22 17:15 ` [dpdk-dev] [PATCH v7 " 谢华伟(此时此刻)
2021-02-22 17:15 ` [dpdk-dev] [PATCH v7 1/2] bus/pci: use PCI standard sysfs entry to get PIO address 谢华伟(此时此刻)
2021-02-22 17:15 ` [dpdk-dev] [PATCH v7 2/2] bus/pci: support MMIO in PCI ioport accessors 谢华伟(此时此刻)
2021-02-22 17:25 ` Ferruh Yigit
2021-02-23 14:20 ` 谢华伟(此时此刻)
2021-02-24 15:45 ` Ferruh Yigit
2021-02-25 3:59 ` 谢华伟(此时此刻)
2021-02-25 9:52 ` David Marchand
2021-03-01 15:43 ` 谢华伟(此时此刻)
2021-03-02 13:14 ` David Marchand
2021-03-03 7:56 ` 谢华伟(此时此刻)
2021-03-01 16:01 ` [dpdk-dev] [PATCH v8 0/2] support both PIO and MMIO BAR for legacy device in virtio PMD 谢华伟(此时此刻)
2021-03-01 16:01 ` [dpdk-dev] [PATCH v8 1/2] bus/pci: use PCI standard sysfs entry to get PIO address 谢华伟(此时此刻)
2021-03-01 16:01 ` [dpdk-dev] [PATCH v8 2/2] bus/pci: support MMIO in PCI ioport accessors 谢华伟(此时此刻)
2021-03-02 12:48 ` [dpdk-dev] [PATCH v8 0/2] support both PIO and MMIO BAR for legacy device in virtio PMD 谢华伟(此时此刻)
2021-03-02 13:01 ` Ferruh Yigit
2021-03-02 13:17 ` David Marchand
2021-03-03 17:46 ` [dpdk-dev] [PATCH v9 " 谢华伟(此时此刻)
2021-03-03 17:46 ` [dpdk-dev] [PATCH v9 1/2] bus/pci: use PCI standard sysfs entry to get PIO address 谢华伟(此时此刻)
2021-03-03 17:46 ` [dpdk-dev] [PATCH v9 2/2] bus/pci: support MMIO in PCI ioport accessors 谢华伟(此时此刻)
2021-03-03 18:24 ` [dpdk-dev] [PATCH v9 0/2] support both PIO and MMIO BAR for legacy device in virtio PMD Stephen Hemminger
2021-03-04 13:45 ` 谢华伟(此时此刻)
2021-03-03 18:47 ` [dpdk-dev] [PATCH v10 0/2] support both PIO and MMIO BAR for legacy virito device 谢华伟(此时此刻)
2021-03-03 18:47 ` [dpdk-dev] [PATCH v10 1/2] bus/pci: use PCI standard sysfs entry to get PIO address 谢华伟(此时此刻)
2021-03-05 16:17 ` 谢华伟(此时此刻)
2021-03-09 6:22 ` 谢华伟(此时此刻)
2021-03-09 7:44 ` David Marchand
2021-03-03 18:47 ` [dpdk-dev] [PATCH v10 2/2] bus/pci: support MMIO in PCI ioport accessors 谢华伟(此时此刻)
2021-03-10 17:36 ` [dpdk-dev] [PATCH v11 0/2] support both PIO and MMIO BAR for legacy virito device 谢华伟(此时此刻)
2021-03-10 17:36 ` [dpdk-dev] [PATCH v11 1/2] bus/pci: use PCI standard sysfs entry to get PIO address 谢华伟(此时此刻)
2021-03-10 17:36 ` [dpdk-dev] [PATCH v11 2/2] bus/pci: support MMIO in PCI ioport accessors 谢华伟(此时此刻)
2021-03-11 6:42 ` Wang, Haiyue
2021-03-15 10:19 ` David Marchand
2021-03-15 11:25 ` 谢华伟(此时此刻)
2021-03-15 13:11 ` Wang, Haiyue
2021-03-11 11:54 ` [dpdk-dev] [PATCH v11 0/2] support both PIO and MMIO BAR for legacy virito device Wang, Yinan
2021-03-12 14:32 ` David Marchand
2021-03-15 14:16 ` David Marchand
2021-03-17 8:12 ` 谢华伟(此时此刻)
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