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Tue, 8 Feb 2022 13:08:01 +0000 Message-ID: <b0594ad4-8fc1-43a8-2034-699479c35051@intel.com> Date: Tue, 8 Feb 2022 13:07:45 +0000 Subject: Re: [dpdk-dev] [PATCH v5 1/2] ethdev: support queue-based priority flow control Content-Language: en-US To: <jerinj@marvell.com>, <dev@dpdk.org>, Thomas Monjalon <thomas@monjalon.net>, Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>, "Ray Kinsella" <mdr@ashroe.eu> CC: <ajit.khaparde@broadcom.com>, <aboyer@pensando.io>, <beilei.xing@intel.com>, <bruce.richardson@intel.com>, <chas3@att.com>, <chenbo.xia@intel.com>, <ciara.loftus@intel.com>, <dsinghrawat@marvell.com>, <ed.czeck@atomicrules.com>, <evgenys@amazon.com>, <grive@u256.net>, <g.singh@nxp.com>, <zhouguoyang@huawei.com>, <haiyue.wang@intel.com>, <hkalra@marvell.com>, <heinrich.kuhn@corigine.com>, <hemant.agrawal@nxp.com>, <hyonkim@cisco.com>, <igorch@amazon.com>, <irusskikh@marvell.com>, <jgrajcia@cisco.com>, <jasvinder.singh@intel.com>, <jianwang@trustnetic.com>, <jiawenwu@trustnetic.com>, <jingjing.wu@intel.com>, <johndale@cisco.com>, <john.miller@atomicrules.com>, <linville@tuxdriver.com>, <keith.wiles@intel.com>, <kirankumark@marvell.com>, <oulijun@huawei.com>, <lironh@marvell.com>, <longli@microsoft.com>, <mw@semihalf.com>, <spinler@cesnet.cz>, <matan@nvidia.com>, <matt.peters@windriver.com>, <maxime.coquelin@redhat.com>, <mk@semihalf.com>, <humin29@huawei.com>, <pnalla@marvell.com>, <ndabilpuram@marvell.com>, <qiming.yang@intel.com>, <qi.z.zhang@intel.com>, <radhac@marvell.com>, <rahul.lakkireddy@chelsio.com>, <rmody@marvell.com>, <rosen.xu@intel.com>, <sachin.saxena@oss.nxp.com>, <skoteshwar@marvell.com>, <shshaikh@marvell.com>, <shaibran@amazon.com>, <shepard.siegel@atomicrules.com>, <asomalap@amd.com>, <somnath.kotur@broadcom.com>, <sthemmin@microsoft.com>, <steven.webster@windriver.com>, <skori@marvell.com>, <mtetsuyah@gmail.com>, <vburru@marvell.com>, <viacheslavo@nvidia.com>, <xiao.w.wang@intel.com>, <cloud.wangxiaoyun@huawei.com>, <yisen.zhuang@huawei.com>, <yongwang@vmware.com>, <xuanziyang2@huawei.com> References: <20220207135511.3012285-1-jerinj@marvell.com> <20220208085049.3248053-1-jerinj@marvell.com> From: Ferruh Yigit <ferruh.yigit@intel.com> X-User: ferruhy In-Reply-To: <20220208085049.3248053-1-jerinj@marvell.com> Content-Type: text/plain; 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The first case is the port level PFC configuration, in > this case, rte_eth_dev_priority_flow_ctrl_set() API shall be used to > configure the PFC, and PFC frames will be generated using based on VLAN > TC value. > > The second case is the queue level PFC configuration, in this > case, Any packet field content can be used to steer the packet to the > specific queue using rte_flow or RSS and then use > rte_eth_dev_priority_flow_ctrl_queue_configure() to configure the > TC mapping on each queue. > Based on congestion selected on the specific queue, configured TC > shall be used to generate PFC frames. > > Signed-off-by: Jerin Jacob <jerinj@marvell.com> > Signed-off-by: Sunil Kumar Kori <skori@marvell.com> For series, Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com> Applied to dpdk-next-net/main, thanks.