From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id B2037A00C5; Thu, 15 Sep 2022 11:52:50 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4C6D84021D; Thu, 15 Sep 2022 11:52:50 +0200 (CEST) Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by mails.dpdk.org (Postfix) with ESMTP id 3935340156 for ; Thu, 15 Sep 2022 11:52:48 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1663235567; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ffdJn2K8fIZDpJ3a57I5I3391b1JTfpkkBjnxU4P6L4=; b=fwzzbOgSjOtir0+Ptp082CTlBGbMjWGTOPpw9EANiAOLgQ9hPT0ZtJnFhY1sz6N0byr6E0 M8EMTD0WHPsRstljBo1VguLmkkAwauBNsiUHyhFoMsL7ICLk+/JrmrkzR0FyWNVls7ydvr A48YTRgSeO9v09KUkHj+j2Nwo1Ppvjg= Received: from mimecast-mx02.redhat.com (mx3-rdu2.redhat.com [66.187.233.73]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-122-Raf6lQz7MMSBFGI-W2fUAQ-1; Thu, 15 Sep 2022 05:52:38 -0400 X-MC-Unique: Raf6lQz7MMSBFGI-W2fUAQ-1 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.rdu2.redhat.com [10.11.54.3]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 7C0CD1C05ABF; Thu, 15 Sep 2022 09:52:38 +0000 (UTC) Received: from [10.39.208.12] (unknown [10.39.208.12]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 4BAEE1121315; Thu, 15 Sep 2022 09:52:37 +0000 (UTC) Message-ID: Date: Thu, 15 Sep 2022 11:52:35 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.12.0 Subject: Re: [PATCH v2 18/37] baseband/acc100: implement configurable queue depth To: Hernan Vargas , dev@dpdk.org, gakhil@marvell.com, trix@redhat.com Cc: nicolas.chautru@intel.com, qi.z.zhang@intel.com References: <20220820023157.189047-1-hernan.vargas@intel.com> <20220820023157.189047-19-hernan.vargas@intel.com> From: Maxime Coquelin In-Reply-To: <20220820023157.189047-19-hernan.vargas@intel.com> X-Scanned-By: MIMEDefang 3.1 on 10.11.54.3 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Language: en-US Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On 8/20/22 04:31, Hernan Vargas wrote: > Implement new feature to make queue depth configurable based on decode > or encode mode. > > Signed-off-by: Hernan Vargas > --- > drivers/baseband/acc100/rte_acc100_pmd.c | 12 +++++++++--- > 1 file changed, 9 insertions(+), 3 deletions(-) > > diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c > index 9c15797503..460233a499 100644 > --- a/drivers/baseband/acc100/rte_acc100_pmd.c > +++ b/drivers/baseband/acc100/rte_acc100_pmd.c > @@ -967,9 +967,15 @@ acc100_queue_setup(struct rte_bbdev *dev, uint16_t queue_id, > q->qgrp_id = (q_idx >> ACC100_GRP_ID_SHIFT) & 0xF; > q->vf_id = (q_idx >> ACC100_VF_ID_SHIFT) & 0x3F; > q->aq_id = q_idx & 0xF; > - q->aq_depth = (conf->op_type == RTE_BBDEV_OP_TURBO_DEC) ? > - (1 << d->acc100_conf.q_ul_4g.aq_depth_log2) : > - (1 << d->acc100_conf.q_dl_4g.aq_depth_log2); > + q->aq_depth = 0; > + if (conf->op_type == RTE_BBDEV_OP_TURBO_DEC) > + q->aq_depth = (1 << d->acc100_conf.q_ul_4g.aq_depth_log2); > + else if (conf->op_type == RTE_BBDEV_OP_TURBO_ENC) > + q->aq_depth = (1 << d->acc100_conf.q_dl_4g.aq_depth_log2); > + else if (conf->op_type == RTE_BBDEV_OP_LDPC_DEC) > + q->aq_depth = (1 << d->acc100_conf.q_ul_5g.aq_depth_log2); > + else if (conf->op_type == RTE_BBDEV_OP_LDPC_ENC) > + q->aq_depth = (1 << d->acc100_conf.q_dl_5g.aq_depth_log2); > > q->mmio_reg_enqueue = RTE_PTR_ADD(d->mmio_base, > queue_offset(d->pf_device, Reviewed-by: Maxime Coquelin Thanks, Maxime