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Fri, 20 Mar 2020 06:44:29 -0400 X-MC-Unique: F691Bbm5MASo5CU5hmg5Sw-1 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 71922107ACCC; Fri, 20 Mar 2020 10:44:28 +0000 (UTC) Received: from [10.33.36.217] (unknown [10.33.36.217]) by smtp.corp.redhat.com (Postfix) with ESMTP id 139F394945; Fri, 20 Mar 2020 10:44:25 +0000 (UTC) To: "Zhang, Qi Z" , "Yang, Qiming" , "Xing, Beilei" Cc: "Ye, Xiaolong" , "dev@dpdk.org" , "Shelton, Benjamin H" , "Stillwell Jr, Paul M" References: <20200309114357.31800-1-qi.z.zhang@intel.com> <20200309114357.31800-5-qi.z.zhang@intel.com> <039ED4275CED7440929022BC67E70611547E54BD@SHSMSX103.ccr.corp.intel.com> From: Kevin Traynor Autocrypt: addr=ktraynor@redhat.com; keydata= mQINBF2J2awBEADUEPNhgNI+nJNgiTAUcw4YIgVXEoHlsNPyyzG1BEXkWXALy0Y3fNTiw6+r ltWDkF9jzL9kfkecgQ67itGfk1OaBXgSGKuw1PUpxAwX2Bi76LAR6M5OsyGM9TSVVQwARalz hMwRBIZPzPc7or6Pw7jAOJ8SQGJ1Zlp1YJCjrvpe87V1tH/LY8Wnxn/EuoseFmWILAQZAtYS tGjcrAgYn3SPMLR1B0BP5bTBY06vWQjiufH8drenfDnMJAzuBdG1mqjnTqCjULZ3Hunv4xqZ aMnkvL/K5Tj1c12Oe4930EE53LrXIBUltRg5mBudSWHnC7twjH0082HH9f963Z/2UI63SFIT iUvRvAzJYytgy7XnWLQ0+goZBADKYfolOuC0H8VgCaux8u8KFF28Dy+N6TV2KI58jTlyg1Zu l7QwykZpnOkJFiy37Gfbu3YEOzO72cP/S7/A+zvuqkxi63jyEkd+FY99vLt/HN2MUZwRmKDw UPbLkmrs8WU01/POVsqDcfvz7vu2St8hqqTiSIdQGS2zyTKB2/DvPSM3jws3udkIYSuhn+X4 QBiV6lkVZ7DSE6a065gnAauAql+b32Eymy+xnG5jCt1tR+0Cp2VZYCR9OU2gmomUKBDoX/He pSgED01CqYPNjN+TddirwmQX7ep4DtXc8FWvv2g/pq9WZFQk2QARAQABtCNLZXZpbiBUcmF5 bm9yIDxrdHJheW5vckByZWRoYXQuY29tPokCTgQTAQgAOBYhBAoiOaH51tHF7VYtEI9CINER a+yJBQJdidmsAhsDBQsJCAcCBhUKCQgLAgQWAgMBAh4BAheAAAoJEI9CINERa+yJoxIP/3VF 2TIgW4ckxhRFCvFu/606bnvCPie88ake4uWVWMAWwcMc4fKEltRWRCpkSVOwgqoMHnyHxK5r kOKzx2CLJMX5TgTMfKzPuaBDHngHLUzl2DStpBzrod0cVg5TShdmmfjY61uxRJKz+DlSkwgJ riADdVF5PPosQXTkKSGf2ombpTGpx/pue9ocjnr3x4SDpRLlnooM6Jf/3Y3Ib4jX6HPEyWuY b+owIIk9y2nRRGPQ6jbqAhsrXd9V+77UL0QuGWloMuKMZFbNg8hbu7X5aFijAbfxj4YUgojS ba7gfGZQan8h32A9KGQWrmsCBc3j2GqEPsX0r05X7cn7WL6IOPgQJ5EiQ7PlazQYVLrvZg9B n0GKK0k6895mLG0ZZ5v/qajOPF52etSmvFD1WUPb4OqaHqGA9ZtMpaKFRt7Y6rpXqKNU1xzW F5KjbTPtTb9WF3An8dciVv+AYUI7totkZYkWvQtgss8lfaX3NKUvXLVxqK0z3dQyr7rF/tYz PneTKypSksjCgaEBLSrsRmM5zKfe7tSNF/fDntfIq/029Jtcw29TcWEP57peNu6TtejewQD9 sTI+oqiXvW2D5l7LNUDYG8eMJp2oT7I0ZSBRvwcbmjH0DtN/bXCCFfCvk8Yic68F3tV1ctix wQARVKDBhT30uCxycRWojCYqTgNJJS71uQINBF2J2awBEADP57PR2IpSYBeNSrsAjeIcsahE N4SQP2C4s50S8QEWAUhqMRI7WNv5cfeef0nDvcl1IUA6oz5SokbcsbMa+mRgaNF4N5KikWTO LPYxq2YVJoXwJ+tKmNzyOLFUIfFJ4NBJZple5dTfWzD00Dbb19Mri1hy1mWMqNTPGBee1+hw Qcp6n3mmGECvajs8G5A7NyXbwL8ihN7HX9D01ucD62b4G03yKe2g/hvKgcdUVmhCldJlF27I 2fSR9tDxH9pZqRODY4rjbFZEey/vWKXqjE+DQ8AtMSEaDfFe5D+i4Aw6erWQ3Wr+DwZt1/7G dIAElGA/q90T1ENVwJX9y7fsQssawKYYdDqURHCl5JuDXI+VXUypExipUUT5SPycMmbLsx0D iKEqPPDQWKxkIDVKqj2+EhamSuJznZUwBLJKn0h4zrIWiXWUy07lRwtVuhaDXhF3GfW+5W/x wAg7Qg3w00ASsb/XTHBIhMnenKDfS7ihtQA8SacwX8ySdxb+15XPyiplM979qBQ0mhnilulm MIJzEf/JxoYR5huuj4f1PFqqrsP06Dl+YGB7dQZp3IKggS5c3/TAynARRg9N89UsDXNtp7X0 tgIPFF5k6fnHE0J5O64GYHeTqN/1aE6dAEOV9WrGzQAJxU9ipikb8jKAWXzLewRIKGmoPcRZ WdB0NmIjmQARAQABiQI2BBgBCAAgFiEECiI5ofnW0cXtVi0Qj0Ig0RFr7IkFAl2J2awCGwwA CgkQj0Ig0RFr7IkkORAAl/NbX93WK5MEoRw7/DaPTo/Lo6Pj1XMeSqGyACigHK/452UDvlEH NjNJMzYYrNIjMtEmN9VVCfjT38CSca7mpGQVwchc0mC7QSPAETLCS+UacVf/Kwxz5FfkEUUw UT7A+uyVOIgW3d9ldlRzkHA2czonSSgTQU+i2g6DM4ha+BuQb4byAXH6HQHt/Zh1J64z0ohH v6iGsCzCY/sMWF8+LEGSnzMGRCLiiwSF0vJBHbzWK68fANaF4gBV0Z/+6tQRFN7YMhj/INmk qgvHj1ZzHFNtirjMGPRxoZs51YoLQM/aBPxKrnmXThx1ufH+0L6sGmFTugiDt0XSEkC5reH7 a+VhQ1VTFFQrClA8NmDSPzFeuhru4ryaaDHO+uEB16cNHxHrQtlP/2hts2JM5lwkZRWJ5A57 h8eDEIK5be47T85NVHfuTaboNRmgg1HygVejhGUtt69u/0MVRg/roUTa0FyEbNsvz4qAecyW yWzMcVrcGJDQLC9JLKEpoyUF6gdTKaiDL2Vao4+XRIA3Y57b6MO35a3HuzAv7+i5Z0mnDEJO XxXqTOmKYpMIGexzM/PtuA0712sT1abG9tAJ17ao/B7cqMW5IkKkalemFbWfI2unns4Papvo tk9igVqyp6EJDU98z5TJioCVojwK2laDaoIjTJk9YYv3iwCsqPd5feU= Message-ID: Date: Fri, 20 Mar 2020 10:44:25 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.5.0 MIME-Version: 1.0 In-Reply-To: <039ED4275CED7440929022BC67E70611547E54BD@SHSMSX103.ccr.corp.intel.com> Content-Language: en-US X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: quoted-printable Subject: Re: [dpdk-dev] [PATCH 04/28] net/ice/base: read PSM clock frequency from register X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On 20/03/2020 07:14, Zhang, Qi Z wrote: > Hi Kevin: >=20 >> -----Original Message----- >> From: Kevin Traynor >> Sent: Monday, March 9, 2020 11:45 PM >> To: Zhang, Qi Z ; Yang, Qiming >> ; Xing, Beilei >> Cc: Ye, Xiaolong ; dev@dpdk.org; Shelton, Benjami= n H >> ; Stillwell Jr, Paul M >> >> Subject: Re: [dpdk-dev] [PATCH 04/28] net/ice/base: read PSM clock frequ= ency >> from register >> >> On 09/03/2020 11:43, Qi Zhang wrote: >>> Read the GLGEN_CLKSTAT_SRC register to determine which PSM clock >>> frequency is selected. This ensures that the rate limiter profile >>> calculations will be correct. >>> >> >> This seems to be a fix whereby a default and possibly incorrect frequenc= y was >> used previously. In that case, it should have a Fixes tag (and probably = stable tag >> too) >=20 > OK, will add fixline >> >>> Signed-off-by: Ben Shelton >>> Signed-off-by: Paul M Stillwell Jr >>> Signed-off-by: Qi Zhang >>> --- >>> drivers/net/ice/base/ice_common.c | 1 + >>> drivers/net/ice/base/ice_sched.c | 59 >>> +++++++++++++++++++++++++++++++++------ >>> drivers/net/ice/base/ice_sched.h | 7 ++++- >>> drivers/net/ice/base/ice_type.h | 4 ++- >>> 4 files changed, 61 insertions(+), 10 deletions(-) >>> >>> diff --git a/drivers/net/ice/base/ice_common.c >>> b/drivers/net/ice/base/ice_common.c >>> index 786e99d21..9ef1aeef2 100644 >>> --- a/drivers/net/ice/base/ice_common.c >>> +++ b/drivers/net/ice/base/ice_common.c >>> @@ -672,6 +672,7 @@ enum ice_status ice_init_hw(struct ice_hw *hw) >>> =09=09=09 "Failed to get scheduler allocated resources\n"); >>> =09=09goto err_unroll_alloc; >>> =09} >>> +=09ice_sched_get_psm_clk_freq(hw); >>> >>> =09/* Initialize port_info struct with scheduler data */ >>> =09status =3D ice_sched_init_port(hw->port_info); >>> diff --git a/drivers/net/ice/base/ice_sched.c >>> b/drivers/net/ice/base/ice_sched.c >>> index 553fc28ff..26c4ba36f 100644 >>> --- a/drivers/net/ice/base/ice_sched.c >>> +++ b/drivers/net/ice/base/ice_sched.c >>> @@ -1369,6 +1369,46 @@ enum ice_status >>> ice_sched_query_res_alloc(struct ice_hw *hw) } >>> >>> /** >>> + * ice_sched_get_psm_clk_freq - determine the PSM clock frequency >>> + * @hw: pointer to the HW struct >>> + * >>> + * Determine the PSM clock frequency and store in HW struct */ void >>> +ice_sched_get_psm_clk_freq(struct ice_hw *hw) { >>> +=09u32 val, clk_src; >>> + >>> +=09val =3D rd32(hw, GLGEN_CLKSTAT_SRC); >>> +=09clk_src =3D (val & GLGEN_CLKSTAT_SRC_PSM_CLK_SRC_M) >> >>> +=09=09GLGEN_CLKSTAT_SRC_PSM_CLK_SRC_S; >>> + >>> +#define PSM_CLK_SRC_367_MHZ 0x0 >>> +#define PSM_CLK_SRC_416_MHZ 0x1 >>> +#define PSM_CLK_SRC_446_MHZ 0x2 >>> +#define PSM_CLK_SRC_390_MHZ 0x3 >>> + >>> +=09switch (clk_src) { >>> +=09case PSM_CLK_SRC_367_MHZ: >>> +=09=09hw->psm_clk_freq =3D ICE_PSM_CLK_367MHZ_IN_HZ; >>> +=09=09break; >>> +=09case PSM_CLK_SRC_416_MHZ: >>> +=09=09hw->psm_clk_freq =3D ICE_PSM_CLK_416MHZ_IN_HZ; >>> +=09=09break; >>> +=09case PSM_CLK_SRC_446_MHZ: >>> +=09=09hw->psm_clk_freq =3D ICE_PSM_CLK_446MHZ_IN_HZ; >>> +=09=09break; >>> +=09case PSM_CLK_SRC_390_MHZ: >>> +=09=09hw->psm_clk_freq =3D ICE_PSM_CLK_390MHZ_IN_HZ; >>> +=09=09break; >>> +=09default: >>> +=09=09ice_debug(hw, ICE_DBG_SCHED, "PSM clk_src unexpected %u\n", >>> +=09=09=09 clk_src); >>> +=09=09/* fall back to a safe default */ >>> +=09=09hw->psm_clk_freq =3D ICE_PSM_CLK_446MHZ_IN_HZ; >>> +=09} >>> +} >>> + >>> +/** >>> * ice_sched_find_node_in_subtree - Find node in part of base node >> subtree >>> * @hw: pointer to the HW struct >>> * @base: pointer to the base node >>> @@ -2867,7 +2907,7 @@ ice_sched_update_elem(struct ice_hw *hw, struct >> ice_sched_node *node, >>> */ >>> static enum ice_status >>> ice_sched_cfg_node_bw_alloc(struct ice_hw *hw, struct ice_sched_node >> *node, >>> -=09=09=09 enum ice_rl_type rl_type, u8 bw_alloc) >>> +=09=09=09 enum ice_rl_type rl_type, u16 bw_alloc) >> >> This fix looks unrelated to the commit message >=20 > Yes, will move this fix to patch that cover all the minor fix. >> >>> { >>> =09struct ice_aqc_txsched_elem_data buf; >>> =09struct ice_aqc_txsched_elem *data; >>> @@ -3671,11 +3711,12 @@ ice_cfg_agg_bw_alloc(struct ice_port_info *pi, >>> u32 agg_id, u8 ena_tcmap, >>> >>> /** >>> * ice_sched_calc_wakeup - calculate RL profile wakeup parameter >>> + * @hw: pointer to the HW struct >>> * @bw: bandwidth in Kbps >>> * >>> * This function calculates the wakeup parameter of RL profile. >>> */ >>> -static u16 ice_sched_calc_wakeup(s32 bw) >>> +static u16 ice_sched_calc_wakeup(struct ice_hw *hw, s32 bw) >>> { >>> =09s64 bytes_per_sec, wakeup_int, wakeup_a, wakeup_b, wakeup_f; >>> =09s32 wakeup_f_int; >>> @@ -3683,7 +3724,7 @@ static u16 ice_sched_calc_wakeup(s32 bw) >>> >>> =09/* Get the wakeup integer value */ >>> =09bytes_per_sec =3D DIV_64BIT(((s64)bw * 1000), BITS_PER_BYTE); >>> -=09wakeup_int =3D DIV_64BIT(ICE_RL_PROF_FREQUENCY, bytes_per_sec); >>> +=09wakeup_int =3D DIV_64BIT(hw->psm_clk_freq, bytes_per_sec); >>> =09if (wakeup_int > 63) { >>> =09=09wakeup =3D (u16)((1 << 15) | wakeup_int); >>> =09} else { >>> @@ -3692,7 +3733,7 @@ static u16 ice_sched_calc_wakeup(s32 bw) >>> =09=09 */ >>> =09=09wakeup_b =3D (s64)ICE_RL_PROF_MULTIPLIER * wakeup_int; >>> =09=09wakeup_a =3D DIV_64BIT((s64)ICE_RL_PROF_MULTIPLIER * >>> -=09=09=09=09 ICE_RL_PROF_FREQUENCY, bytes_per_sec); >>> +=09=09=09=09 hw->psm_clk_freq, bytes_per_sec); >>> >>> =09=09/* Get Fraction value */ >>> =09=09wakeup_f =3D wakeup_a - wakeup_b; >>> @@ -3712,13 +3753,15 @@ static u16 ice_sched_calc_wakeup(s32 bw) >>> >>> /** >>> * ice_sched_bw_to_rl_profile - convert BW to profile parameters >>> + * @hw: pointer to the HW struct >>> * @bw: bandwidth in Kbps >>> * @profile: profile parameters to return >>> * >>> * This function converts the BW to profile structure format. >>> */ >>> static enum ice_status >>> -ice_sched_bw_to_rl_profile(u32 bw, struct ice_aqc_rl_profile_elem >>> *profile) >>> +ice_sched_bw_to_rl_profile(struct ice_hw *hw, u32 bw, >>> +=09=09=09 struct ice_aqc_rl_profile_elem *profile) >>> { >>> =09enum ice_status status =3D ICE_ERR_PARAM; >>> =09s64 bytes_per_sec, ts_rate, mv_tmp; >>> @@ -3738,7 +3781,7 @@ ice_sched_bw_to_rl_profile(u32 bw, struct >> ice_aqc_rl_profile_elem *profile) >>> =09for (i =3D 0; i < 64; i++) { >>> =09=09u64 pow_result =3D BIT_ULL(i); >>> >>> -=09=09ts_rate =3D DIV_64BIT((s64)ICE_RL_PROF_FREQUENCY, >>> +=09=09ts_rate =3D DIV_64BIT((s64)hw->psm_clk_freq, >>> =09=09=09=09 pow_result * ICE_RL_PROF_TS_MULTIPLIER); >>> =09=09if (ts_rate <=3D 0) >>> =09=09=09continue; >>> @@ -3762,7 +3805,7 @@ ice_sched_bw_to_rl_profile(u32 bw, struct >> ice_aqc_rl_profile_elem *profile) >>> =09if (found) { >>> =09=09u16 wm; >>> >>> -=09=09wm =3D ice_sched_calc_wakeup(bw); >>> +=09=09wm =3D ice_sched_calc_wakeup(hw, bw); >>> =09=09profile->rl_multiply =3D CPU_TO_LE16(mv); >>> =09=09profile->wake_up_calc =3D CPU_TO_LE16(wm); >>> =09=09profile->rl_encode =3D CPU_TO_LE16(encode); @@ -3831,7 +3874,7 >> @@ >>> ice_sched_add_rl_profile(struct ice_port_info *pi, >>> =09if (!rl_prof_elem) >>> =09=09return NULL; >>> >>> -=09status =3D ice_sched_bw_to_rl_profile(bw, &rl_prof_elem->profile); >>> +=09status =3D ice_sched_bw_to_rl_profile(hw, bw, &rl_prof_elem->profil= e); >>> =09if (status !=3D ICE_SUCCESS) >>> =09=09goto exit_add_rl_prof; >>> >>> diff --git a/drivers/net/ice/base/ice_sched.h >>> b/drivers/net/ice/base/ice_sched.h >>> index d6b467477..1a8549931 100644 >>> --- a/drivers/net/ice/base/ice_sched.h >>> +++ b/drivers/net/ice/base/ice_sched.h >>> @@ -25,12 +25,16 @@ >>> =09((BIT(11) - 1) * 64) /* In Bytes */ >>> #define ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY >> =09ICE_MAX_BURST_SIZE_ALLOWED >>> >>> -#define ICE_RL_PROF_FREQUENCY 446000000 #define >>> ICE_RL_PROF_ACCURACY_BYTES 128 #define ICE_RL_PROF_MULTIPLIER >> 10000 >>> #define ICE_RL_PROF_TS_MULTIPLIER 32 #define ICE_RL_PROF_FRACTION >> 512 >>> >>> +#define ICE_PSM_CLK_367MHZ_IN_HZ 367647059 #define >>> +ICE_PSM_CLK_416MHZ_IN_HZ 416666667 #define >> ICE_PSM_CLK_446MHZ_IN_HZ >>> +446428571 #define ICE_PSM_CLK_390MHZ_IN_HZ 390625000 >>> + >>> struct rl_profile_params { >>> =09u32 bw;=09=09=09/* in Kbps */ >>> =09u16 rl_multiplier; >>> @@ -83,6 +87,7 @@ ice_aq_query_sched_elems(struct ice_hw *hw, u16 >> elems_req, >>> =09=09=09 u16 *elems_ret, struct ice_sq_cd *cd); enum ice_status >>> ice_sched_init_port(struct ice_port_info *pi); enum ice_status >>> ice_sched_query_res_alloc(struct ice_hw *hw); >>> +void ice_sched_get_psm_clk_freq(struct ice_hw *hw); >>> >>> /* Functions to cleanup scheduler SW DB */ void >>> ice_sched_clear_port(struct ice_port_info *pi); diff --git >>> a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h >>> index 9773a549f..237220ee8 100644 >>> --- a/drivers/net/ice/base/ice_type.h >>> +++ b/drivers/net/ice/base/ice_type.h >>> @@ -524,7 +524,7 @@ struct ice_sched_node { >>> #define ICE_TXSCHED_GET_EIR_BWALLOC(x)=09\ >>> =09LE16_TO_CPU((x)->info.eir_bw.bw_alloc) >>> >>> -struct ice_sched_rl_profle { >>> +struct ice_sched_rl_profile { >> >> Is this used somewhere? >=20 > The base code is shared by linux/dpdk/windows, the consideration here is > 1) we try to make code identical, otherwise a lot of compile option is in= volved to strip out code for different usage. ok, I can see the argument for keeping the base code common and not customizing. Thanks. > 2) some code may not be used on specific platform currently, but might be= active in future. >=20 > Thanks > Qi >=20 >> >>> =09u32 rate; /* In Kbps */ >>> =09struct ice_aqc_rl_profile_elem info; }; @@ -741,6 +741,8 @@ struct >>> ice_hw { >>> =09struct ice_sched_rl_profile **cir_profiles; >>> =09struct ice_sched_rl_profile **eir_profiles; >>> =09struct ice_sched_rl_profile **srl_profiles; >>> +=09/* PSM clock frequency for calculating RL profile params */ >>> +=09u32 psm_clk_freq; >>> =09u64 debug_mask;=09=09/* BITMAP for debug mask */ >>> =09enum ice_mac_type mac_type; >>> >>> >=20