Re: [dpdk-dev] [PATCH v16 18/23] event/dlb: add dequeue and its burst variants

["Burakov, Anatoly" <anatoly.burakov@intel.com>]

On 01-Nov-20 11:30 PM, Timothy McDaniel wrote:
> Add support for dequeue, dequeue_burst, ...
> 
> DLB does not currently support interrupts, but instead uses
> umonitor/umwait if supported by the processor. This allows
> the software to monitor and wait on writes to a cache-line.
> 
> DLB supports normal and sparse cq mode. In normal mode the
> hardware will pack 4 QEs into each cache line. In sparse cq
> mode, the hardware will only populate one QE per cache line.
> Software must be aware of the cq mode, and take the appropriate
> actions, based on the mode.
> 
> Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
> Reviewed-by: Gage Eads <gage.eads@intel.com>
> ---

<snip>

> +static inline int
> +dlb_dequeue_wait(struct dlb_eventdev *dlb,
> +		 struct dlb_eventdev_port *ev_port,
> +		 struct dlb_port *qm_port,
> +		 uint64_t timeout,
> +		 uint64_t start_ticks)
> +{
> +	struct process_local_port_data *port_data;
> +	uint64_t elapsed_ticks;
> +
> +	port_data = &dlb_port[qm_port->id][PORT_TYPE(qm_port)];
> +
> +	elapsed_ticks = rte_get_timer_cycles() - start_ticks;
> +
> +	/* Wait/poll time expired */
> +	if (elapsed_ticks >= timeout) {
> +		/* Interrupts not supported by PF PMD */
> +		return 1;
> +	} else if (dlb->umwait_allowed) {
> +		volatile struct dlb_dequeue_qe *cq_base;
> +		union {
> +			uint64_t raw_qe[2];
> +			struct dlb_dequeue_qe qe;
> +		} qe_mask;
> +		uint64_t expected_value;
> +		volatile uint64_t *monitor_addr;
> +
> +		qe_mask.qe.cq_gen = 1; /* set mask */
> +
> +		cq_base = port_data->cq_base;
> +		monitor_addr = (volatile uint64_t *)(volatile void *)
> +			&cq_base[qm_port->cq_idx];
> +		monitor_addr++; /* cq_gen bit is in second 64bit location */
> +
> +		if (qm_port->gen_bit)
> +			expected_value = qe_mask.raw_qe[1];
> +		else
> +			expected_value = 0;
> +
> +		rte_power_monitor(monitor_addr, expected_value,
> +				  qe_mask.raw_qe[1], timeout + start_ticks,
> +				  sizeof(uint64_t));
> +
> +		DLB_INC_STAT(ev_port->stats.traffic.rx_umonitor_umwait, 1);
> +	} else {
> +		uint64_t poll_interval = RTE_LIBRTE_PMD_DLB_POLL_INTERVAL;
> +		uint64_t curr_ticks = rte_get_timer_cycles();
> +		uint64_t init_ticks = curr_ticks;
> +
> +		while ((curr_ticks - start_ticks < timeout) &&
> +		       (curr_ticks - init_ticks < poll_interval))
> +			curr_ticks = rte_get_timer_cycles();
> +	}
> +
> +	return 0;

For UMONITOR code, LGTM.

Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>

-- 
Thanks,
Anatoly