From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 54361A04E7; Mon, 2 Nov 2020 11:15:16 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 3AAF1BE6B; Mon, 2 Nov 2020 11:15:10 +0100 (CET) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id DB148BE48 for ; Mon, 2 Nov 2020 11:15:08 +0100 (CET) IronPort-SDR: TVKTL4N3/pGlUsaq3ALWBmXn79gGyO3VACg52Y5s+P/VvP9TTT9rUmSgLTVvzqlezEvuPm5OhZ JOqu4egRg8sw== X-IronPort-AV: E=McAfee;i="6000,8403,9792"; a="155850115" X-IronPort-AV: E=Sophos;i="5.77,444,1596524400"; d="scan'208";a="155850115" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Nov 2020 02:15:06 -0800 IronPort-SDR: bAZ5njrmqIOLJsB2s2vj/B0SM6hgb6Kc3LqXUt0N58syXii0/s208vq8W9z2SAsUJF66ZA9NMo 6qeNdOJhnI/w== X-IronPort-AV: E=Sophos;i="5.77,444,1596524400"; d="scan'208";a="537963338" Received: from aburakov-mobl.ger.corp.intel.com (HELO [10.213.195.207]) ([10.213.195.207]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Nov 2020 02:15:04 -0800 To: Timothy McDaniel Cc: dev@dpdk.org, erik.g.carrillo@intel.com, gage.eads@intel.com, harry.van.haaren@intel.com, jerinj@marvell.com, thomas@monjalon.net References: <20200612212434.6852-2-timothy.mcdaniel@intel.com> <1604273415-13912-1-git-send-email-timothy.mcdaniel@intel.com> <1604273415-13912-19-git-send-email-timothy.mcdaniel@intel.com> From: "Burakov, Anatoly" Message-ID: Date: Mon, 2 Nov 2020 10:15:02 +0000 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:68.0) Gecko/20100101 Thunderbird/68.12.0 MIME-Version: 1.0 In-Reply-To: <1604273415-13912-19-git-send-email-timothy.mcdaniel@intel.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Subject: Re: [dpdk-dev] [PATCH v16 18/23] event/dlb: add dequeue and its burst variants X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On 01-Nov-20 11:30 PM, Timothy McDaniel wrote: > Add support for dequeue, dequeue_burst, ... > > DLB does not currently support interrupts, but instead uses > umonitor/umwait if supported by the processor. This allows > the software to monitor and wait on writes to a cache-line. > > DLB supports normal and sparse cq mode. In normal mode the > hardware will pack 4 QEs into each cache line. In sparse cq > mode, the hardware will only populate one QE per cache line. > Software must be aware of the cq mode, and take the appropriate > actions, based on the mode. > > Signed-off-by: Timothy McDaniel > Reviewed-by: Gage Eads > --- > +static inline int > +dlb_dequeue_wait(struct dlb_eventdev *dlb, > + struct dlb_eventdev_port *ev_port, > + struct dlb_port *qm_port, > + uint64_t timeout, > + uint64_t start_ticks) > +{ > + struct process_local_port_data *port_data; > + uint64_t elapsed_ticks; > + > + port_data = &dlb_port[qm_port->id][PORT_TYPE(qm_port)]; > + > + elapsed_ticks = rte_get_timer_cycles() - start_ticks; > + > + /* Wait/poll time expired */ > + if (elapsed_ticks >= timeout) { > + /* Interrupts not supported by PF PMD */ > + return 1; > + } else if (dlb->umwait_allowed) { > + volatile struct dlb_dequeue_qe *cq_base; > + union { > + uint64_t raw_qe[2]; > + struct dlb_dequeue_qe qe; > + } qe_mask; > + uint64_t expected_value; > + volatile uint64_t *monitor_addr; > + > + qe_mask.qe.cq_gen = 1; /* set mask */ > + > + cq_base = port_data->cq_base; > + monitor_addr = (volatile uint64_t *)(volatile void *) > + &cq_base[qm_port->cq_idx]; > + monitor_addr++; /* cq_gen bit is in second 64bit location */ > + > + if (qm_port->gen_bit) > + expected_value = qe_mask.raw_qe[1]; > + else > + expected_value = 0; > + > + rte_power_monitor(monitor_addr, expected_value, > + qe_mask.raw_qe[1], timeout + start_ticks, > + sizeof(uint64_t)); > + > + DLB_INC_STAT(ev_port->stats.traffic.rx_umonitor_umwait, 1); > + } else { > + uint64_t poll_interval = RTE_LIBRTE_PMD_DLB_POLL_INTERVAL; > + uint64_t curr_ticks = rte_get_timer_cycles(); > + uint64_t init_ticks = curr_ticks; > + > + while ((curr_ticks - start_ticks < timeout) && > + (curr_ticks - init_ticks < poll_interval)) > + curr_ticks = rte_get_timer_cycles(); > + } > + > + return 0; For UMONITOR code, LGTM. Acked-by: Anatoly Burakov -- Thanks, Anatoly