From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <dev-bounces@dpdk.org>
Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124])
	by inbox.dpdk.org (Postfix) with ESMTP id 4084A4404F;
	Wed, 12 Jun 2024 17:17:33 +0200 (CEST)
Received: from mails.dpdk.org (localhost [127.0.0.1])
	by mails.dpdk.org (Postfix) with ESMTP id 2852D42EE5;
	Wed, 12 Jun 2024 17:05:44 +0200 (CEST)
Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10])
 by mails.dpdk.org (Postfix) with ESMTP id 494D842E6B
 for <dev@dpdk.org>; Wed, 12 Jun 2024 17:05:36 +0200 (CEST)
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple;
 d=intel.com; i=@intel.com; q=dns/txt; s=Intel;
 t=1718204737; x=1749740737;
 h=from:to:cc:subject:date:message-id:in-reply-to:
 references:mime-version:content-transfer-encoding;
 bh=phGdHhlwBcVu2VyR9OgL1cFhg/CsFwDBt7p0eAzpYv8=;
 b=H/qRol6F08RCgm/erXs8ydRWIkYFqwWERhGZD/lxdWpOSU0PodYVTlbE
 0PSEt2uiohw7MSmtC2HrNjb/S6qBfvNpzlaEwFNQqCZ7/LQYOezr1S1M+
 UrruuN8ISjUCrHpXMlzUu6l8NdsA070uWv3jQmVfs/WVXkjZAvFq/cemk
 N8TYLUJlcdyNMGk72o5B2EcUqW+zDNkJvRwACb7rMiAFVqiuT0PgMvZob
 nz8z/s3xUQ99B4JTKTLdTgbc+nHKzy2BAAwF7mrSugsE16t6XKG784ArW
 0aNE8LM+3b1zyDy1RLS5YTPR2GlLn9o+2K3+wjAMXOJv1PKzqEXJVMiUJ g==;
X-CSE-ConnectionGUID: fkNEyxBhQ52Z4Ds8+y6YPA==
X-CSE-MsgGUID: 4LqJ6RxWTDeIkRx29ja9Kg==
X-IronPort-AV: E=McAfee;i="6700,10204,11101"; a="32459730"
X-IronPort-AV: E=Sophos;i="6.08,233,1712646000"; d="scan'208";a="32459730"
Received: from orviesa009.jf.intel.com ([10.64.159.149])
 by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;
 12 Jun 2024 08:05:36 -0700
X-CSE-ConnectionGUID: 8LvOQ04JTcqLt4fv3GY2kQ==
X-CSE-MsgGUID: w7PawiuqQkqnaKjfgWnGzQ==
X-ExtLoop1: 1
X-IronPort-AV: E=Sophos;i="6.08,233,1712646000"; d="scan'208";a="39925591"
Received: from silpixa00401119.ir.intel.com ([10.55.129.167])
 by orviesa009.jf.intel.com with ESMTP; 12 Jun 2024 08:05:34 -0700
From: Anatoly Burakov <anatoly.burakov@intel.com>
To: dev@dpdk.org
Cc: Ian Stokes <ian.stokes@intel.com>, bruce.richardson@intel.com,
 Tomaszx Wakula <tomaszx.wakula@intel.com>
Subject: [PATCH v2 084/148] net/ice/base: add function to read SDP section
 from NVM
Date: Wed, 12 Jun 2024 16:01:18 +0100
Message-ID: <c1c77f7870f4382ea282f9793aebf14a0804ee55.1718204529.git.anatoly.burakov@intel.com>
X-Mailer: git-send-email 2.43.0
In-Reply-To: <cover.1718204528.git.anatoly.burakov@intel.com>
References: <20240430154014.1026-1-ian.stokes@intel.com>
 <cover.1718204528.git.anatoly.burakov@intel.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
X-BeenThere: dev@dpdk.org
X-Mailman-Version: 2.1.29
Precedence: list
List-Id: DPDK patches and discussions <dev.dpdk.org>
List-Unsubscribe: <https://mails.dpdk.org/options/dev>,
 <mailto:dev-request@dpdk.org?subject=unsubscribe>
List-Archive: <http://mails.dpdk.org/archives/dev/>
List-Post: <mailto:dev@dpdk.org>
List-Help: <mailto:dev-request@dpdk.org?subject=help>
List-Subscribe: <https://mails.dpdk.org/listinfo/dev>,
 <mailto:dev-request@dpdk.org?subject=subscribe>
Errors-To: dev-bounces@dpdk.org

From: Ian Stokes <ian.stokes@intel.com>

Add API and definitions related to reading SDP section from NVM, related to PTP
pins assignment.

Signed-off-by: Tomaszx Wakula <tomaszx.wakula@intel.com>
Signed-off-by: Ian Stokes <ian.stokes@intel.com>
---
 drivers/net/ice/base/ice_adminq_cmd.h | 23 +++++++
 drivers/net/ice/base/ice_ptp_hw.c     | 87 +++++++++++++++++++++++++++
 drivers/net/ice/base/ice_ptp_hw.h     |  3 +
 3 files changed, 113 insertions(+)

diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index 242a71f0ac..35dafd2190 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1949,6 +1949,29 @@ struct ice_aqc_nvm {
 #define ICE_AQC_NVM_LLDP_STATUS_M_LEN		4 /* In Bits */
 #define ICE_AQC_NVM_LLDP_STATUS_RD_LEN		4 /* In Bytes */
 
+#define ICE_AQC_NVM_SDP_CFG_PTR_OFFSET		0xD8
+#define ICE_AQC_NVM_SDP_CFG_PTR_RD_LEN		2 /* In Bytes */
+#define ICE_AQC_NVM_SDP_CFG_PTR_M		MAKEMASK(0x7FFF, 0)
+#define ICE_AQC_NVM_SDP_CFG_PTR_TYPE_M		BIT(15)
+#define ICE_AQC_NVM_SDP_CFG_HEADER_LEN		2 /* In Bytes */
+#define ICE_AQC_NVM_SDP_CFG_SEC_LEN_LEN		2 /* In Bytes */
+#define ICE_AQC_NVM_SDP_CFG_DATA_LEN		14 /* In Bytes */
+#define ICE_AQC_NVM_SDP_CFG_MAX_SECTION_SIZE	7
+#define ICE_AQC_NVM_SDP_CFG_PIN_SIZE		10
+#define ICE_AQC_NVM_SDP_CFG_PIN_OFFSET		6
+#define ICE_AQC_NVM_SDP_CFG_PIN_MASK		MAKEMASK(0x3FF, \
+						ICE_AQC_NVM_SDP_CFG_PIN_OFFSET)
+#define ICE_AQC_NVM_SDP_CFG_CHAN_OFFSET		4
+#define ICE_AQC_NVM_SDP_CFG_CHAN_MASK		MAKEMASK(0x3, \
+						ICE_AQC_NVM_SDP_CFG_CHAN_OFFSET)
+#define ICE_AQC_NVM_SDP_CFG_DIR_OFFSET		3
+#define ICE_AQC_NVM_SDP_CFG_DIR_MASK		MAKEMASK(0x1, \
+						ICE_AQC_NVM_SDP_CFG_DIR_OFFSET)
+#define ICE_AQC_NVM_SDP_CFG_SDP_NUM_OFFSET		0
+#define ICE_AQC_NVM_SDP_CFG_SDP_NUM_MASK	MAKEMASK(0x7, \
+					     ICE_AQC_NVM_SDP_CFG_SDP_NUM_OFFSET)
+#define ICE_AQC_NVM_SDP_CFG_NA_PIN_MASK		MAKEMASK(0x1, 15)
+
 #define ICE_AQC_NVM_TX_TOPO_MOD_ID		0x14B
 #define ICE_AQC_NVM_CMPO_MOD_ID			0x153
 
diff --git a/drivers/net/ice/base/ice_ptp_hw.c b/drivers/net/ice/base/ice_ptp_hw.c
index cc840a8a4b..c01d0c8045 100644
--- a/drivers/net/ice/base/ice_ptp_hw.c
+++ b/drivers/net/ice/base/ice_ptp_hw.c
@@ -5155,6 +5155,93 @@ bool ice_is_pca9575_present(struct ice_hw *hw)
 	return false;
 }
 
+/**
+ * ice_ptp_read_sdp_section_from_nvm - reads SDP section from NVM
+ * @hw: pointer to the HW struct
+ * @section_exist: on return, returns true if section exist
+ * @pin_desc_num: on return, returns the number of ice_ptp_pin_desc entries
+ * @pin_config_num: on return, returns the number of pin that should be
+ *		    exposed on pin_config I/F
+ * @sdp_entries: on return, returns the SDP connection section from NVM
+ * @nvm_entries: on return, returns the number of valid entries in sdp_entries
+ *
+ * Reads SDP connection section from NVM
+ * Returns -1 if NVM read failed or section corrupted, otherwise 0
+ */
+int ice_ptp_read_sdp_section_from_nvm(struct ice_hw *hw, bool *section_exist,
+				      u8 *pin_desc_num, u8 *pin_config_num,
+				      u16 *sdp_entries, u8 *nvm_entries)
+{
+	__le16 loc_raw_data, raw_nvm_entries;
+	u32 loc_data, i, all_pin_bitmap = 0;
+	int err;
+
+	*section_exist = false;
+	*pin_desc_num = 0;
+	*pin_config_num = 0;
+
+	err = ice_acquire_nvm(hw, ICE_RES_READ);
+	if (err)
+		goto exit;
+
+	/* Read the offset of EMP_SR_PTR */
+	err = ice_aq_read_nvm(hw, ICE_AQC_NVM_START_POINT,
+			      ICE_AQC_NVM_SDP_CFG_PTR_OFFSET,
+			      ICE_AQC_NVM_SDP_CFG_PTR_RD_LEN,
+			      &loc_raw_data, false, true, NULL);
+	if (err)
+		goto exit;
+
+	/* check if section exist */
+	loc_data = LE16_TO_CPU(loc_raw_data);
+	if ((loc_data & ICE_AQC_NVM_SDP_CFG_PTR_M) == ICE_AQC_NVM_SDP_CFG_PTR_M)
+		goto exit;
+
+	if (loc_data & ICE_AQC_NVM_SDP_CFG_PTR_TYPE_M) {
+		loc_data &= ICE_AQC_NVM_SDP_CFG_PTR_M;
+		loc_data *= ICE_AQC_NVM_SECTOR_UNIT;
+	} else {
+		loc_data *= ICE_AQC_NVM_WORD_UNIT;
+	}
+
+	/* Skip SDP configuration section length (2 bytes) */
+	loc_data += ICE_AQC_NVM_SDP_CFG_HEADER_LEN;
+
+	/* read number of valid entries */
+	err = ice_aq_read_nvm(hw, ICE_AQC_NVM_START_POINT, loc_data,
+			      ICE_AQC_NVM_SDP_CFG_SEC_LEN_LEN, &raw_nvm_entries,
+			      false, true, NULL);
+	if (err)
+		goto exit;
+	*nvm_entries = (u8)LE16_TO_CPU(raw_nvm_entries);
+
+	/* Read entire SDP configuration section */
+	loc_data += ICE_AQC_NVM_SDP_CFG_SEC_LEN_LEN;
+	err = ice_aq_read_nvm(hw, ICE_AQC_NVM_START_POINT, loc_data,
+			      ICE_AQC_NVM_SDP_CFG_DATA_LEN, sdp_entries,
+			      false, true, NULL);
+	if (err)
+		goto exit;
+
+	/* get number of existing pin/connector */
+	for (i = 0; i < *nvm_entries; i++) {
+		all_pin_bitmap |= (sdp_entries[i] &
+				   ICE_AQC_NVM_SDP_CFG_PIN_MASK) >>
+				   ICE_AQC_NVM_SDP_CFG_PIN_OFFSET;
+		if (sdp_entries[i] & ICE_AQC_NVM_SDP_CFG_NA_PIN_MASK)
+			*pin_desc_num += 1;
+	}
+
+	for (i = 0; i < ICE_AQC_NVM_SDP_CFG_PIN_SIZE - 1; i++)
+		*pin_config_num += (all_pin_bitmap & (1 << i)) != 0;
+	*pin_desc_num += *pin_config_num;
+
+	*section_exist = true;
+exit:
+	ice_release_nvm(hw);
+	return err;
+}
+
 /**
  * ice_ptp_write_direct_incval_e830 - Prep PHY port increment value change
  * @hw: pointer to HW struct
diff --git a/drivers/net/ice/base/ice_ptp_hw.h b/drivers/net/ice/base/ice_ptp_hw.h
index 8a1f5c6163..0da20e6758 100644
--- a/drivers/net/ice/base/ice_ptp_hw.h
+++ b/drivers/net/ice/base/ice_ptp_hw.h
@@ -263,6 +263,9 @@ ice_write_pca9575_reg_e810t(struct ice_hw *hw, u8 offset, u8 data);
 int ice_read_sma_ctrl_e810t(struct ice_hw *hw, u8 *data);
 int ice_write_sma_ctrl_e810t(struct ice_hw *hw, u8 data);
 bool ice_is_pca9575_present(struct ice_hw *hw);
+int ice_ptp_read_sdp_section_from_nvm(struct ice_hw *hw, bool *section_exist,
+				      u8 *pin_desc_num, u8 *pin_config_num,
+				      u16 *sdp_entries, u8 *nvm_entries);
 
 void
 ice_ptp_process_cgu_err(struct ice_hw *hw, struct ice_rq_event_info *event);
-- 
2.43.0