DPDK patches and discussions
 help / color / mirror / Atom feed
From: Maxime Coquelin <maxime.coquelin@redhat.com>
To: Hernan Vargas <hernan.vargas@intel.com>,
	dev@dpdk.org, gakhil@marvell.com, trix@redhat.com
Cc: nicolas.chautru@intel.com, qi.z.zhang@intel.com, stable@dpdk.org
Subject: Re: [PATCH v3 02/30] baseband/acc100: add function to check AQ availability
Date: Fri, 14 Oct 2022 11:25:06 +0200	[thread overview]
Message-ID: <c41753b1-3f39-6ed8-2aa5-9556e9c51cff@redhat.com> (raw)
In-Reply-To: <20221012025346.204394-3-hernan.vargas@intel.com>



On 10/12/22 04:53, Hernan Vargas wrote:
> It is possible for some corner case to run more batch enqueue than
> supported. A protection is required to avoid that corner case.
> Enhance all ACC100 enqueue operations with check to see if there is room
> in the atomic queue for enqueueing batches into the queue manager
> Check room in AQ for the enqueues batches into Qmgr
> 
> Fixes: 5ad5060f8f7 ("baseband/acc100: add LDPC processing functions")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc/rte_acc100_pmd.c | 30 ++++++++++++++++++++-------
>   1 file changed, 22 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/baseband/acc/rte_acc100_pmd.c b/drivers/baseband/acc/rte_acc100_pmd.c
> index 733766ad3e..b436bd9078 100644
> --- a/drivers/baseband/acc/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc/rte_acc100_pmd.c
> @@ -2995,12 +2995,27 @@ acc100_enqueue_enc_tb(struct rte_bbdev_queue_data *q_data,
>   	return i;
>   }
>   
> +/* Check room in AQ for the enqueues batches into Qmgr */
> +static int32_t
> +acc100_aq_avail(struct rte_bbdev_queue_data *q_data, uint16_t num_ops)
> +{
> +	struct acc_queue *q = q_data->queue_private;
> +	int32_t aq_avail = q->aq_depth -
> +			((q->aq_enqueued - q->aq_dequeued + ACC_MAX_QUEUE_DEPTH)
> +			% ACC_MAX_QUEUE_DEPTH) - (num_ops >> 7);
> +	if (aq_avail <= 0)

Maybe use unlikely() here.


> +		acc_enqueue_queue_full(q_data);
> +
> +	return aq_avail;
> +}
> +
>   /* Enqueue encode operations for ACC100 device. */
>   static uint16_t
>   acc100_enqueue_enc(struct rte_bbdev_queue_data *q_data,
>   		struct rte_bbdev_enc_op **ops, uint16_t num)
>   {
> -	if (unlikely(num == 0))
> +	int32_t aq_avail = acc100_aq_avail(q_data, num);

Please insert new line for readability.

> +	if (unlikely((aq_avail <= 0) || (num == 0)))
>   		return 0;

Ditto
>   	if (ops[0]->turbo_enc.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)
>   		return acc100_enqueue_enc_tb(q_data, ops, num);
> @@ -3013,7 +3028,8 @@ static uint16_t
>   acc100_enqueue_ldpc_enc(struct rte_bbdev_queue_data *q_data,
>   		struct rte_bbdev_enc_op **ops, uint16_t num)
>   {
> -	if (unlikely(num == 0))
> +	int32_t aq_avail = acc100_aq_avail(q_data, num);

New line.

> +	if (unlikely((aq_avail <= 0) || (num == 0)))
>   		return 0;
>   	if (ops[0]->ldpc_enc.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)
>   		return acc100_enqueue_enc_tb(q_data, ops, num);
> @@ -3183,7 +3199,8 @@ static uint16_t
>   acc100_enqueue_dec(struct rte_bbdev_queue_data *q_data,
>   		struct rte_bbdev_dec_op **ops, uint16_t num)
>   {
> -	if (unlikely(num == 0))
> +	int32_t aq_avail = acc100_aq_avail(q_data, num);

New line.

> +	if (unlikely((aq_avail <= 0) || (num == 0)))
>   		return 0;

New line.

>   	if (ops[0]->turbo_dec.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)
>   		return acc100_enqueue_dec_tb(q_data, ops, num);
> @@ -3196,11 +3213,8 @@ static uint16_t
>   acc100_enqueue_ldpc_dec(struct rte_bbdev_queue_data *q_data,
>   		struct rte_bbdev_dec_op **ops, uint16_t num)
>   {
> -	struct acc_queue *q = q_data->queue_private;
> -	int32_t aq_avail = q->aq_depth +
> -			(q->aq_dequeued - q->aq_enqueued) / 128;
> -
> -	if (unlikely((aq_avail == 0) || (num == 0)))
> +	int32_t aq_avail = acc100_aq_avail(q_data, num);

New line.

> +	if (unlikely((aq_avail <= 0) || (num == 0)))
>   		return 0;
>   
>   	if (ops[0]->ldpc_dec.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)


  reply	other threads:[~2022-10-14  9:25 UTC|newest]

Thread overview: 58+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-12  2:53 [PATCH v3 00/30] baseband/acc100: changes for 22.11 Hernan Vargas
2022-10-12  2:53 ` [PATCH v3 01/30] baseband/acc100: fix ring availability calculation Hernan Vargas
2022-10-14  9:18   ` Maxime Coquelin
2022-10-12  2:53 ` [PATCH v3 02/30] baseband/acc100: add function to check AQ availability Hernan Vargas
2022-10-14  9:25   ` Maxime Coquelin [this message]
2022-10-12  2:53 ` [PATCH v3 03/30] baseband/acc100: memory leak fix Hernan Vargas
2022-10-14  9:29   ` Maxime Coquelin
2022-10-12  2:53 ` [PATCH v3 04/30] baseband/acc100: add LDPC encoder padding function Hernan Vargas
2022-10-14  9:33   ` Maxime Coquelin
2022-10-12  2:53 ` [PATCH v3 05/30] baseband/acc100: check turbo dec/enc input Hernan Vargas
2022-10-14  9:35   ` Maxime Coquelin
2022-10-12  2:53 ` [PATCH v3 06/30] baseband/acc100: check for unlikely operation vals Hernan Vargas
2022-10-14  9:39   ` Maxime Coquelin
2022-10-12  2:53 ` [PATCH v3 07/30] baseband/acc100: enforce additional check on FCW Hernan Vargas
2022-10-14  9:48   ` Maxime Coquelin
2022-10-12  2:53 ` [PATCH v3 08/30] baseband/acc100: allocate ring/queue mem when NULL Hernan Vargas
2022-10-14  9:55   ` Maxime Coquelin
2022-10-12  2:53 ` [PATCH v3 09/30] baseband/acc100: reduce input length for CRC24B Hernan Vargas
2022-10-14  9:56   ` Maxime Coquelin
2022-10-12  2:53 ` [PATCH v3 10/30] baseband/acc100: fix clearing PF IR outside handler Hernan Vargas
2022-10-14  9:56   ` Maxime Coquelin
2022-10-12  2:53 ` [PATCH v3 11/30] baseband/acc100: set device min alignment to 1 Hernan Vargas
2022-10-14 10:02   ` Maxime Coquelin
2022-10-12  2:53 ` [PATCH v3 12/30] baseband/acc100: add protection for NULL HARQ input Hernan Vargas
2022-10-14 10:03   ` Maxime Coquelin
2022-10-12  2:53 ` [PATCH v3 13/30] baseband/acc100: reset pointer after rte_free Hernan Vargas
2022-10-14 10:03   ` Maxime Coquelin
2022-10-12  2:53 ` [PATCH v3 14/30] baseband/acc100: fix debug print for LDPC FCW Hernan Vargas
2022-10-14 10:03   ` Maxime Coquelin
2022-10-12  2:53 ` [PATCH v3 15/30] baseband/acc100: add enqueue status Hernan Vargas
2022-10-14 10:04   ` Maxime Coquelin
2022-10-12  2:53 ` [PATCH v3 16/30] baseband/acc100: add scatter-gather support Hernan Vargas
2022-10-14 10:06   ` Maxime Coquelin
2022-10-12  2:53 ` [PATCH v3 17/30] baseband/acc100: add HARQ index helper function Hernan Vargas
2022-10-14 10:06   ` Maxime Coquelin
2022-10-12  2:53 ` [PATCH v3 18/30] baseband/acc100: enable input validation by default Hernan Vargas
2022-10-13 12:56   ` [EXT] " Akhil Goyal
2022-10-18 16:28   ` Maxime Coquelin
2022-10-19 22:12     ` Chautru, Nicolas
2022-10-21  8:06       ` Maxime Coquelin
2022-10-12  2:53 ` [PATCH v3 19/30] baseband/acc100: added LDPC transport block support Hernan Vargas
2022-10-12  2:53 ` [PATCH v3 20/30] baseband/acc100: update validate LDPC enc/dec Hernan Vargas
2022-10-12  2:53 ` [PATCH v3 21/30] baseband/acc100: implement configurable queue depth Hernan Vargas
2022-10-12  2:53 ` [PATCH v3 22/30] baseband/acc100: add queue stop operation Hernan Vargas
2022-10-12  2:53 ` [PATCH v3 23/30] baseband/acc100: update uplink CB input length Hernan Vargas
2022-10-12  2:53 ` [PATCH v3 24/30] baseband/acc100: rename ldpc encode function arg Hernan Vargas
2022-10-13 13:04   ` [EXT] " Akhil Goyal
2022-10-12  2:53 ` [PATCH v3 25/30] baseband/acc100: update log messages Hernan Vargas
2022-10-12  2:53 ` [PATCH v3 26/30] baseband/acc100: store FCW from first CB descriptor Hernan Vargas
2022-10-12  2:53 ` [PATCH v3 27/30] baseband/acc100: update device info Hernan Vargas
2022-10-12  2:53 ` [PATCH v3 28/30] baseband/acc100: add ring companion address Hernan Vargas
2022-10-12  2:53 ` [PATCH v3 29/30] baseband/acc100: add workaround for deRM corner cases Hernan Vargas
2022-10-13 13:09   ` [EXT] " Akhil Goyal
2022-10-12  2:53 ` [PATCH v3 30/30] baseband/acc100: configure PMON control registers Hernan Vargas
2022-10-13  8:28 ` [EXT] [PATCH v3 00/30] baseband/acc100: changes for 22.11 Akhil Goyal
2022-10-13 13:01 ` Akhil Goyal
2022-10-14  2:46   ` Chautru, Nicolas
2022-10-14  6:33     ` Akhil Goyal

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=c41753b1-3f39-6ed8-2aa5-9556e9c51cff@redhat.com \
    --to=maxime.coquelin@redhat.com \
    --cc=dev@dpdk.org \
    --cc=gakhil@marvell.com \
    --cc=hernan.vargas@intel.com \
    --cc=nicolas.chautru@intel.com \
    --cc=qi.z.zhang@intel.com \
    --cc=stable@dpdk.org \
    --cc=trix@redhat.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).