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From: Anatoly Burakov <anatoly.burakov@intel.com>
To: dev@dpdk.org, Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>,
 Qi Zhang <qi.z.zhang@intel.com>, Dan Nowlin <dan.nowlin@intel.com>,
 Xiaolong Ye <xiaolong.ye@intel.com>
Cc: Jesse Brandeburg <jesse.brandeburg@intel.com>, ian.stokes@intel.com,
 bruce.richardson@intel.com, stable@dpdk.org
Subject: [PATCH v4 015/103] net/ice/base: fix sign-extension
Date: Wed, 26 Jun 2024 12:41:03 +0100
Message-ID: <c72460f2cdc812223958db46275b3edfe280adca.1719401847.git.anatoly.burakov@intel.com>
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From: Jesse Brandeburg <jesse.brandeburg@intel.com>

Fix a static analysis warning where if the 16-bit value in mask has the high-bit
set, it will be sign extended by the shift left (which converts it to a signed
integer). Avoid this by casting to a u32 to make sure the conversion happens
before the shift and that it stays unsigned.

Fixes: 9467486f179f ("net/ice/base: enable masking for RSS and FD field vectors")
Cc: qi.z.zhang@intel.com
Cc: stable@dpdk.org

Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: Ian Stokes <ian.stokes@intel.com>
---
 drivers/net/ice/base/ice_flex_pipe.c | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index e06dbb0885..413b6f8ece 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -1534,16 +1534,14 @@ ice_write_prof_mask_reg(struct ice_hw *hw, enum ice_block blk, u16 mask_idx,
 	switch (blk) {
 	case ICE_BLK_RSS:
 		offset = GLQF_HMASK(mask_idx);
-		val = (idx << GLQF_HMASK_MSK_INDEX_S) &
-			GLQF_HMASK_MSK_INDEX_M;
-		val |= (mask << GLQF_HMASK_MASK_S) & GLQF_HMASK_MASK_M;
+		val = (idx << GLQF_HMASK_MSK_INDEX_S) & GLQF_HMASK_MSK_INDEX_M;
+		val |= ((u32)mask << GLQF_HMASK_MASK_S) & GLQF_HMASK_MASK_M;
 		break;
 	case ICE_BLK_FD:
 		offset = GLQF_FDMASK(mask_idx);
 		val = (idx << GLQF_FDMASK_MSK_INDEX_S) &
 			GLQF_FDMASK_MSK_INDEX_M;
-		val |= (mask << GLQF_FDMASK_MASK_S) &
-			GLQF_FDMASK_MASK_M;
+		val |= ((u32)mask << GLQF_FDMASK_MASK_S) & GLQF_FDMASK_MASK_M;
 		break;
 	default:
 		ice_debug(hw, ICE_DBG_PKG, "No profile masks for block %d\n",
-- 
2.43.0