From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1F381A09E5; Mon, 7 Dec 2020 15:50:57 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id EDF7CDE3; Mon, 7 Dec 2020 15:50:55 +0100 (CET) Received: from szxga07-in.huawei.com (szxga07-in.huawei.com [45.249.212.35]) by dpdk.org (Postfix) with ESMTP id 92CD6A3 for ; Mon, 7 Dec 2020 15:50:53 +0100 (CET) Received: from DGGEMS409-HUB.china.huawei.com (unknown [172.30.72.60]) by szxga07-in.huawei.com (SkyGuard) with ESMTP id 4CqR7K0QS2z73H9 for ; Mon, 7 Dec 2020 22:50:21 +0800 (CST) Received: from [10.67.103.119] (10.67.103.119) by DGGEMS409-HUB.china.huawei.com (10.3.19.209) with Microsoft SMTP Server id 14.3.487.0; Mon, 7 Dec 2020 22:50:41 +0800 To: Ferruh Yigit CC: , References: <1605871656-51819-1-git-send-email-oulijun@huawei.com> <1605871656-51819-5-git-send-email-oulijun@huawei.com> <25641017-788d-76ad-fdd4-bb2a2c285c63@intel.com> From: oulijun Message-ID: Date: Mon, 7 Dec 2020 22:50:41 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.1.0 MIME-Version: 1.0 In-Reply-To: <25641017-788d-76ad-fdd4-bb2a2c285c63@intel.com> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Transfer-Encoding: 8bit X-Originating-IP: [10.67.103.119] X-CFilter-Loop: Reflected Subject: Re: [dpdk-dev] [PATCH 4/4] net/hns3: fix FEC state query X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" 在 2020/11/20 22:33, Ferruh Yigit 写道: > On 11/20/2020 11:27 AM, Lijun Ou wrote: >> From: "Min Hu (Conor)" >> >> As FEC is not supported below 10 Gbps, CMD(0x031A) offered >> from Firmware read will return fail in 10 Gbps device. >> >> This patch will prevent read this CMD when below 10 Gbps, >> as this is non-sense. >> >> Fixes: 9bf2ea8dbc65 ("net/hns3: support FEC") >> Cc: stable@dpdk.org >> >> Signed-off-by: Min Hu (Connor) >> Signed-off-by: Lijun Ou >> --- >> drivers/net/hns3/hns3_ethdev.c | 38 >> ++++++++++++++++++++++++-------------- >> 1 file changed, 24 insertions(+), 14 deletions(-) >> >> diff --git a/drivers/net/hns3/hns3_ethdev.c >> b/drivers/net/hns3/hns3_ethdev.c >> index d6d3f03..faa7b0a 100644 >> --- a/drivers/net/hns3/hns3_ethdev.c >> +++ b/drivers/net/hns3/hns3_ethdev.c >> @@ -100,7 +100,7 @@ static int hns3_add_mc_addr(struct hns3_hw *hw, >> static int hns3_remove_mc_addr(struct hns3_hw *hw, >> struct rte_ether_addr *mac_addr); >> static int hns3_restore_fec(struct hns3_hw *hw); >> -static int hns3_query_dev_fec_info(struct rte_eth_dev *dev); >> +static int hns3_query_dev_fec_info(struct hns3_hw *hw); >> void hns3_ether_format_addr(char *buf, uint16_t size, >> const struct rte_ether_addr *ether_addr) >> @@ -3010,13 +3010,6 @@ hns3_get_capability(struct hns3_hw *hw) >> device_id == HNS3_DEV_ID_200G_RDMA) >> hns3_set_bit(hw->capability, HNS3_DEV_SUPPORT_DCB_B, 1); >> - ret = hns3_query_dev_fec_info(eth_dev); >> - if (ret) { >> - PMD_INIT_LOG(ERR, >> - "failed to query FEC information, ret = %d", ret); >> - return ret; >> - } >> - >> /* Get PCI revision id */ >> ret = rte_pci_read_config(pci_dev, &revision, >> HNS3_PCI_REVISION_ID_LEN, >> HNS3_PCI_REVISION_ID); >> @@ -3148,8 +3141,15 @@ hns3_get_configuration(struct hns3_hw *hw) >> } >> ret = hns3_get_board_configuration(hw); >> - if (ret) >> + if (ret) { >> PMD_INIT_LOG(ERR, "failed to get board configuration: %d", >> ret); >> + return ret; >> + } >> + >> + ret = hns3_query_dev_fec_info(hw); >> + if (ret) >> + PMD_INIT_LOG(ERR, >> + "failed to query FEC information, ret = %d", ret); >> return ret; >> } >> @@ -5797,6 +5797,15 @@ get_current_fec_auto_state(struct hns3_hw *hw, >> uint8_t *state) >> struct hns3_cmd_desc desc; >> int ret; >> + /* >> + * CMD(0x031A) read is not supported in device of link speed >> + * below 10 Gbps. >> + */ >> + if (hw->mac.link_speed < ETH_SPEED_NUM_10G) { >> + *state = 0; >> + return 0; >> + } >> + >> hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_CONFIG_FEC_MODE, true); >> req = (struct hns3_config_fec_cmd *)desc.data; >> ret = hns3_cmd_send(hw, &desc, 1); >> @@ -6003,14 +6012,15 @@ hns3_restore_fec(struct hns3_hw *hw) >> } >> static int >> -hns3_query_dev_fec_info(struct rte_eth_dev *dev) >> +hns3_query_dev_fec_info(struct hns3_hw *hw) >> { >> - struct hns3_adapter *hns = dev->data->dev_private; >> - struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(hns); >> - struct hns3_pf *pf = &hns->pf; >> + struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw); >> + struct hns3_pf *pf = HNS3_DEV_PRIVATE_TO_PF(hns); >> + struct rte_eth_dev *eth_dev; >> int ret; >> - ret = hns3_fec_get(dev, &pf->fec_mode); >> + eth_dev = &rte_eth_devices[hw->data->port_id]; > > Not specific to this patch, but it is not good idea to access global > 'rte_eth_devices' array directly. Why not store the 'eth_dev' in the > device private data in the probe() and use it later? > Can you do a separate patch for this switch? > Thank you may not need to change the paramters of the > 'hns3_query_dev_fec_info()' or remove it from > 'hns3_query_dev_fec_info()' since you will be able to access to > 'eth_dev' easily. Thanks. Your suggestion looks very good to me. I will fixes it in the release cycle. > >> + ret = hns3_fec_get(eth_dev, &pf->fec_mode); >> if (ret) >> hns3_err(hw, "query device FEC info failed, ret = %d", ret); >> > > . >