From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by dpdk.org (Postfix) with ESMTP id 869A01396 for ; Wed, 15 Mar 2017 15:28:04 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=intel.com; i=@intel.com; q=dns/txt; s=intel; t=1489588084; x=1521124084; h=subject:to:references:cc:from:message-id:date: mime-version:in-reply-to:content-transfer-encoding; bh=s4i6t19FjgTk21JnUtUgZpaYRl98BD90AmMr8PGDqDI=; b=uSlYmJ37W7xYsE893ahiaMKjncTJPhDtqCEZnMC8sy1O4FE3kxGbR2bx 5R2IH4yOPBFGhk186IaPCChyyap1LQ==; Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 15 Mar 2017 07:28:03 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.36,168,1486454400"; d="scan'208";a="77126937" Received: from fyigit-mobl1.ger.corp.intel.com (HELO [10.237.220.122]) ([10.237.220.122]) by fmsmga006.fm.intel.com with ESMTP; 15 Mar 2017 07:28:02 -0700 To: Yongseok Koh References: <20170310231334.2457-1-yskoh@mellanox.com> <20170310231334.2457-2-yskoh@mellanox.com> Cc: dev@dpdk.org, adrien.mazarguil@6wind.com, nelio.laranjeiro@6wind.com From: Ferruh Yigit Message-ID: Date: Wed, 15 Mar 2017 14:28:01 +0000 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 MIME-Version: 1.0 In-Reply-To: <20170310231334.2457-2-yskoh@mellanox.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 8bit Subject: Re: [dpdk-dev] [PATCH v2 1/2] net/mlx5: add enhanced multi-packet send for ConnectX-5 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 15 Mar 2017 14:28:04 -0000 On 3/10/2017 11:13 PM, Yongseok Koh wrote: > ConnectX-5 supports enhanced version of multi-packet send (MPS). An MPS Tx > descriptor can carry multiple packets either by including pointers of > packets or by inlining packets. Inlining packet data can be helpful to > better utilize PCIe bandwidth. In addition, Enhanced MPS supports hybrid > mode - mixing inlined packets and pointers in a descriptor. This feature is > enabled by default if supported by HW. > > Signed-off-by: Yongseok Koh <...> > + uintptr_t addr; <...> > + addr = htonll(addr); > + *dseg = (rte_v128u32_t) { > + htonl(length), > + txq_mp2mr(txq, txq_mb2mp(buf)), > + addr, > + addr >> 32, This creates build error for 32bit target: ...drivers/net/mlx5/mlx5_rxtx.c: In function ‘mlx5_tx_burst_empw’: ...drivers/net/mlx5/mlx5_rxtx.c:1630:10: error: right shift count >= width of type [-Werror=shift-count-overflow] addr >> 32, ^~