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SRVR:CY4PR1101MB2165; H:CY4PR1101MB2183.namprd11.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: aquantia.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: GC0ngMrBJB4ptMPnAlXeoh85wp8XP0O4isSUaR8MnmkSUeGsDyQ6MJfXHukIAy4UlfYjC6BAE3zRUJ0WnCem8u6ggqEHED7p+3DYnG22Swod/SpQSFKqUJHKi5o8vAr+w68L+hUZd+Su/luxvZqgRGM102Nmt9848YnXYa4B/Ppx+1Ttav8/xE5AbDfURn8GQsa90xuGte2lcLnYghlXdK3ihMv4HDUpZ5JXcND6pO3s+fjR7oQk1cGdcQvpSwd9zaUJO1ElVRo9L2kMdOZqZc//UwbBEtFlMNfYLkpDeuir6aVZzal9hBVIIlnkyQ58ZDsef4uvu2CgbA4oqUMqJVYPC1SE7TncBVtuqs1u2lu8y/2ROH/hNrTxwR/Z+tRH2dw7e0arBYtiWKbaNsSHhj7HyiB3nbqIAbtZes6kPsM= Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: aquantia.com X-MS-Exchange-CrossTenant-Network-Message-Id: 68824f1b-aaf8-4330-aba0-08d73de6ae8b X-MS-Exchange-CrossTenant-originalarrivaltime: 20 Sep 2019 16:22:08.0054 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 83e2e134-991c-4ede-8ced-34d47e38e6b1 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: d43dc2NyCbiwJCtLlepwe8JzrB+Mj//hMg75voCnI5UQGj8j+YYpiUfVYQcIay8yI39dkMr0/Mga9tVnuaxuPA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY4PR1101MB2165 Subject: [dpdk-dev] [PATCH v2 3/3] net/atlantic: add FW mailbox guard mutex X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Pavel Belous Driver uses the Firmware mailbox to read statistics and configure some features. This patch introduces a mutex to provide consistent access to the FW mailbox to prevent potential data corruption. Fixes: 86d36773bd42 ("net/atlantic: implement firmware operations") Signed-off-by: Pavel Belous Signed-off-by: Igor Russkikh --- drivers/net/atlantic/atl_ethdev.c | 4 ++ drivers/net/atlantic/atl_types.h | 3 + drivers/net/atlantic/hw_atl/hw_atl_utils_fw2x.c | 82 ++++++++++++++++++---= ---- 3 files changed, 68 insertions(+), 21 deletions(-) diff --git a/drivers/net/atlantic/atl_ethdev.c b/drivers/net/atlantic/atl_e= thdev.c index 1b9d514..1331b5f 100644 --- a/drivers/net/atlantic/atl_ethdev.c +++ b/drivers/net/atlantic/atl_ethdev.c @@ -410,6 +410,8 @@ eth_atl_dev_init(struct rte_eth_dev *eth_dev) =20 hw->aq_nic_cfg =3D &adapter->hw_cfg; =20 + pthread_mutex_init(&hw->mbox_mutex, NULL); + /* disable interrupt */ atl_disable_intr(hw); =20 @@ -474,6 +476,8 @@ eth_atl_dev_uninit(struct rte_eth_dev *eth_dev) rte_free(eth_dev->data->mac_addrs); eth_dev->data->mac_addrs =3D NULL; =20 + pthread_mutex_destroy(&hw->mbox_mutex); + return 0; } =20 diff --git a/drivers/net/atlantic/atl_types.h b/drivers/net/atlantic/atl_ty= pes.h index 19aaf37..c200a1f 100644 --- a/drivers/net/atlantic/atl_types.h +++ b/drivers/net/atlantic/atl_types.h @@ -10,6 +10,7 @@ #include #include #include +#include =20 typedef uint8_t u8; typedef int8_t s8; @@ -137,6 +138,8 @@ struct aq_hw_s { u32 rpc_addr; u32 rpc_tid; struct hw_aq_atl_utils_fw_rpc rpc; + + pthread_mutex_t mbox_mutex; }; =20 struct aq_fw_ops { diff --git a/drivers/net/atlantic/hw_atl/hw_atl_utils_fw2x.c b/drivers/net/= atlantic/hw_atl/hw_atl_utils_fw2x.c index 70d6e14..55dc728 100644 --- a/drivers/net/atlantic/hw_atl/hw_atl_utils_fw2x.c +++ b/drivers/net/atlantic/hw_atl/hw_atl_utils_fw2x.c @@ -6,6 +6,7 @@ */ =20 #include +#include #include "../atl_hw_regs.h" =20 #include "../atl_types.h" @@ -217,13 +218,15 @@ int aq_fw2x_get_mac_permanent(struct aq_hw_s *self, u= 8 *mac) u32 mac_addr[2] =3D { 0 }; u32 efuse_addr =3D aq_hw_read_reg(self, HW_ATL_FW2X_MPI_EFUSE_ADDR); =20 + pthread_mutex_lock(&self->mbox_mutex); + if (efuse_addr !=3D 0) { err =3D hw_atl_utils_fw_downld_dwords(self, efuse_addr + (40U * 4U), mac_addr, ARRAY_SIZE(mac_addr)); if (err) - return err; + goto exit; mac_addr[0] =3D rte_constant_bswap32(mac_addr[0]); mac_addr[1] =3D rte_constant_bswap32(mac_addr[1]); } @@ -252,6 +255,10 @@ int aq_fw2x_get_mac_permanent(struct aq_hw_s *self, u8= *mac) h >>=3D 8; mac[0] =3D (u8)(0xFFU & h); } + +exit: + pthread_mutex_unlock(&self->mbox_mutex); + return err; } =20 @@ -261,6 +268,9 @@ static int aq_fw2x_update_stats(struct aq_hw_s *self) u32 mpi_opts =3D aq_hw_read_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR); u32 orig_stats_val =3D mpi_opts & BIT(CAPS_HI_STATISTICS); =20 + + pthread_mutex_lock(&self->mbox_mutex); + /* Toggle statistics bit for FW to update */ mpi_opts =3D mpi_opts ^ BIT(CAPS_HI_STATISTICS); aq_hw_write_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR, mpi_opts); @@ -271,9 +281,15 @@ static int aq_fw2x_update_stats(struct aq_hw_s *self) BIT(CAPS_HI_STATISTICS)), 1U, 10000U); if (err) - return err; + goto exit; + + err =3D hw_atl_utils_update_stats(self); + +exit: + pthread_mutex_unlock(&self->mbox_mutex); + + return err; =20 - return hw_atl_utils_update_stats(self); } =20 static int aq_fw2x_get_temp(struct aq_hw_s *self, int *temp) @@ -283,6 +299,8 @@ static int aq_fw2x_get_temp(struct aq_hw_s *self, int *= temp) u32 temp_val =3D mpi_opts & BIT(CAPS_HI_TEMPERATURE); u32 temp_res; =20 + pthread_mutex_lock(&self->mbox_mutex); + /* Toggle statistics bit for FW to 0x36C.18 (CAPS_HI_TEMPERATURE) */ mpi_opts =3D mpi_opts ^ BIT(CAPS_HI_TEMPERATURE); aq_hw_write_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR, mpi_opts); @@ -298,6 +316,9 @@ static int aq_fw2x_get_temp(struct aq_hw_s *self, int *= temp) &temp_res, sizeof(temp_res) / sizeof(u32)); =20 + + pthread_mutex_unlock(&self->mbox_mutex); + if (err) return err; =20 @@ -515,6 +536,8 @@ static int aq_fw2x_get_eeprom(struct aq_hw_s *self, int= dev_addr, if ((self->caps_lo & BIT(CAPS_LO_SMBUS_READ)) =3D=3D 0) return -EOPNOTSUPP; =20 + pthread_mutex_lock(&self->mbox_mutex); + request.msg_id =3D 0; request.device_id =3D dev_addr; request.address =3D offset; @@ -526,7 +549,7 @@ static int aq_fw2x_get_eeprom(struct aq_hw_s *self, int= dev_addr, sizeof(request) / sizeof(u32)); =20 if (err < 0) - return err; + goto exit; =20 /* Toggle 0x368.CAPS_LO_SMBUS_READ bit */ mpi_opts =3D aq_hw_read_reg(self, HW_ATL_FW2X_MPI_CONTROL_ADDR); @@ -541,17 +564,19 @@ static int aq_fw2x_get_eeprom(struct aq_hw_s *self, i= nt dev_addr, 10U, 10000U); =20 if (err < 0) - return err; + goto exit; =20 err =3D hw_atl_utils_fw_downld_dwords(self, self->rpc_addr + sizeof(u32), &result, sizeof(result) / sizeof(u32)); =20 if (err < 0) - return err; + goto exit; =20 - if (result) - return -EIO; + if (result) { + err =3D -EIO; + goto exit; + } =20 if (num_dwords) { err =3D hw_atl_utils_fw_downld_dwords(self, @@ -560,7 +585,7 @@ static int aq_fw2x_get_eeprom(struct aq_hw_s *self, int= dev_addr, num_dwords); =20 if (err < 0) - return err; + goto exit; } =20 if (bytes_remains) { @@ -573,13 +598,16 @@ static int aq_fw2x_get_eeprom(struct aq_hw_s *self, i= nt dev_addr, 1); =20 if (err < 0) - return err; + goto exit; =20 rte_memcpy((u8 *)data + len - bytes_remains, &val, bytes_remains); } =20 - return 0; +exit: + pthread_mutex_unlock(&self->mbox_mutex); + + return err; } =20 =20 @@ -598,13 +626,15 @@ static int aq_fw2x_set_eeprom(struct aq_hw_s *self, i= nt dev_addr, request.address =3D offset; request.length =3D len; =20 + pthread_mutex_lock(&self->mbox_mutex); + /* Write SMBUS request to cfg memory */ err =3D hw_atl_utils_fw_upload_dwords(self, self->rpc_addr, (u32 *)(void *)&request, sizeof(request) / sizeof(u32)); =20 if (err < 0) - return err; + goto exit; =20 /* Write SMBUS data to cfg memory */ u32 num_dwords =3D len / sizeof(u32); @@ -617,7 +647,7 @@ static int aq_fw2x_set_eeprom(struct aq_hw_s *self, int= dev_addr, num_dwords); =20 if (err < 0) - return err; + goto exit; } =20 if (bytes_remains) { @@ -633,7 +663,7 @@ static int aq_fw2x_set_eeprom(struct aq_hw_s *self, int= dev_addr, 1); =20 if (err < 0) - return err; + goto exit; } =20 /* Toggle 0x368.CAPS_LO_SMBUS_WRITE bit */ @@ -648,7 +678,7 @@ static int aq_fw2x_set_eeprom(struct aq_hw_s *self, int= dev_addr, 10U, 10000U); =20 if (err < 0) - return err; + goto exit; =20 /* Read status of write operation */ err =3D hw_atl_utils_fw_downld_dwords(self, self->rpc_addr + sizeof(u32), @@ -656,12 +686,17 @@ static int aq_fw2x_set_eeprom(struct aq_hw_s *self, i= nt dev_addr, sizeof(result) / sizeof(u32)); =20 if (err < 0) - return err; + goto exit; =20 - if (result) - return -EIO; + if (result) { + err =3D -EIO; + goto exit; + } =20 - return 0; +exit: + pthread_mutex_unlock(&self->mbox_mutex); + + return err; } =20 static int aq_fw2x_send_macsec_request(struct aq_hw_s *self, @@ -677,13 +712,15 @@ static int aq_fw2x_send_macsec_request(struct aq_hw_s= *self, if ((self->caps_lo & BIT(CAPS_LO_MACSEC)) =3D=3D 0) return -EOPNOTSUPP; =20 + pthread_mutex_lock(&self->mbox_mutex); + /* Write macsec request to cfg memory */ err =3D hw_atl_utils_fw_upload_dwords(self, self->rpc_addr, (u32 *)(void *)req, RTE_ALIGN(sizeof(*req) / sizeof(u32), sizeof(u32))); =20 if (err < 0) - return err; + goto exit; =20 /* Toggle 0x368.CAPS_LO_MACSEC bit */ mpi_opts =3D aq_hw_read_reg(self, HW_ATL_FW2X_MPI_CONTROL_ADDR); @@ -697,13 +734,16 @@ static int aq_fw2x_send_macsec_request(struct aq_hw_s= *self, 1000U, 10000U); =20 if (err < 0) - return err; + goto exit; =20 /* Read status of write operation */ err =3D hw_atl_utils_fw_downld_dwords(self, self->rpc_addr + sizeof(u32), (u32 *)(void *)response, RTE_ALIGN(sizeof(*response) / sizeof(u32), sizeof(u32))); =20 +exit: + pthread_mutex_unlock(&self->mbox_mutex); + return err; } =20 --=20 2.7.4