[dpdk-dev] [PATCH v7 07/10] crypto/virtio: support AES-CBC

[Jay Zhou <jianjay.zhou@huawei.com>]

The AES-CBC cipher only algorithm has been supported now.

Signed-off-by: Jay Zhou <jianjay.zhou@huawei.com>
Reviewed-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
---
 drivers/crypto/virtio/virtio_crypto_capabilities.h | 30 ++++++++++++++++++++++
 drivers/crypto/virtio/virtio_cryptodev.c           | 11 ++++++++
 2 files changed, 41 insertions(+)
 create mode 100644 drivers/crypto/virtio/virtio_crypto_capabilities.h

diff --git a/drivers/crypto/virtio/virtio_crypto_capabilities.h b/drivers/crypto/virtio/virtio_crypto_capabilities.h
new file mode 100644
index 0000000..db6932f
--- /dev/null
+++ b/drivers/crypto/virtio/virtio_crypto_capabilities.h
@@ -0,0 +1,30 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018 HUAWEI TECHNOLOGIES CO., LTD.
+ */
+
+#ifndef _VIRTIO_CRYPTO_CAPABILITIES_H_
+#define _VIRTIO_CRYPTO_CAPABILITIES_H_
+
+#define VIRTIO_SYM_CAPABILITIES					\
+	{	/* AES CBC */						\
+		.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,			\
+		{.sym = {						\
+			.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,	\
+			{.cipher = {					\
+				.algo = RTE_CRYPTO_CIPHER_AES_CBC,	\
+				.block_size = 16,			\
+				.key_size = {				\
+					.min = 16,			\
+					.max = 32,			\
+					.increment = 8			\
+				},					\
+				.iv_size = {				\
+					.min = 16,			\
+					.max = 16,			\
+					.increment = 0			\
+				}					\
+			}, }						\
+		}, }							\
+	}
+
+#endif /* _VIRTIO_CRYPTO_CAPABILITIES_H_ */
diff --git a/drivers/crypto/virtio/virtio_cryptodev.c b/drivers/crypto/virtio/virtio_cryptodev.c
index 0ab0d38..209f639 100644
--- a/drivers/crypto/virtio/virtio_cryptodev.c
+++ b/drivers/crypto/virtio/virtio_cryptodev.c
@@ -15,6 +15,7 @@
 #include "virtio_cryptodev.h"
 #include "virtqueue.h"
 #include "virtio_crypto_algs.h"
+#include "virtio_crypto_capabilities.h"
 
 int virtio_crypto_logtype_init;
 int virtio_crypto_logtype_session;
@@ -58,6 +59,11 @@ static int virtio_crypto_sym_configure_session(struct rte_cryptodev *dev,
 	{ .vendor_id = 0, /* sentinel */ },
 };
 
+static const struct rte_cryptodev_capabilities virtio_capabilities[] = {
+	VIRTIO_SYM_CAPABILITIES,
+	RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
+};
+
 uint8_t cryptodev_virtio_driver_id;
 
 #define NUM_ENTRY_SYM_CREATE_SESSION 4
@@ -744,6 +750,7 @@ int virtio_crypto_queue_setup(struct rte_cryptodev *dev,
 
 	hw = cryptodev->data->dev_private;
 	hw->dev_id = cryptodev->data->dev_id;
+	hw->virtio_dev_capabilities = virtio_capabilities;
 
 	VIRTIO_CRYPTO_INIT_LOG_DBG("dev %d vendorID=0x%x deviceID=0x%x",
 		cryptodev->data->dev_id, pci_dev->id.vendor_id,
@@ -1131,6 +1138,9 @@ static int virtio_crypto_sym_pad_cipher_param(
 		struct rte_crypto_cipher_xform *cipher_xform)
 {
 	switch (cipher_xform->algo) {
+	case RTE_CRYPTO_CIPHER_AES_CBC:
+		para->algo = VIRTIO_CRYPTO_CIPHER_AES_CBC;
+		break;
 	default:
 		VIRTIO_CRYPTO_SESSION_LOG_ERR("Crypto: Unsupported "
 				"Cipher alg %u", cipher_xform->algo);
@@ -1390,6 +1400,7 @@ static int virtio_crypto_sym_configure_session(
 		info->max_nb_queue_pairs = hw->max_dataqueues;
 		info->sym.max_nb_sessions =
 			RTE_VIRTIO_CRYPTO_PMD_MAX_NB_SESSIONS;
+		info->capabilities = hw->virtio_dev_capabilities;
 	}
 }
 
-- 
1.8.3.1