From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wr0-f178.google.com (mail-wr0-f178.google.com [209.85.128.178]) by dpdk.org (Postfix) with ESMTP id A1CBE1B1B9 for ; Thu, 5 Oct 2017 14:50:32 +0200 (CEST) Received: by mail-wr0-f178.google.com with SMTP id p10so8962455wrc.6 for ; Thu, 05 Oct 2017 05:50:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=8ezcG2M9qpAQF007VlCm5W+nLU4IlDNR7FSQY+NLIck=; b=MCmL54wu/jNPvHdD+MEQn1eho7xu7xQJ8VsM6EiWPouPJqCxtxWJfUQq2StxlYnYLV HZcNYNtn53JRpvlhSEaPChctUx5FlUtrCrzONzFtZbm1f2icPH1rkHtfc0Vli/Uo9yUC VNkOpten5MhtRGCAKDLpYMXD2fD+4t3JmqK9Cq8OxlcHpP2UqDH4aqf6Q8+VVZ4SLuZi chREi+wc0hiqjtqi5ek7W5/LC8CkrwP6mmNIgv7YSQD58LuibfDPqRHKTR5ZyPYH3vDi qXWnrhtWbqLg7We9/tFdNhkDAAZA/tnhMlSEcYEMDcaQE+Y7saBwIA05yeU6tNbCT1mb HofQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=8ezcG2M9qpAQF007VlCm5W+nLU4IlDNR7FSQY+NLIck=; b=mwrvoyVLQQVuTEAweKDslwfrmB4NTBB5fqD/RG1aYaa5wPTxfHorTxT/NqLF9swAle JZkhcyYnaVozbIkFiJdY+tiCG6HkE8CbtcSWYLB74B9/I+5JtW09HAqdOCkpce6ZAKN3 GrOQlyNS19PhbcmbI+c3IZwPmfCty8TOd9z4Hy7cqaXlhsVGEhbmuBink1aRlA9U5jRQ m+2nFAtOcZPi8ZkEW22j2T++sWAveIY4svFpoWVLCHQ4BJGrShme9PRz3Dv0uB3uAdxa D++Utg15YmCJuJeOe14rI5R/4CZwTkq/cx8Ezh32nQZ2vkm6tjD62rwAYRv9XchXH99T n3oA== X-Gm-Message-State: AMCzsaXxCOpznlkMqnEWEIzHGa3oi5ZHWFQA3KyfsCEDXDEYxJfk2U+1 6nsZj763E1ybBdXYYlgYypnPyJvFJg== X-Google-Smtp-Source: AOwi7QCl4K+dZ4+Bk8ZEWKr555ShUdfH77IEbWkNDA8F2HjAnLwMEBDbATO+GINTzVMxGWXsOSYrHw== X-Received: by 10.223.164.18 with SMTP id d18mr16022241wra.115.1507207831828; Thu, 05 Oct 2017 05:50:31 -0700 (PDT) Received: from ping.dev.6wind.com (host.78.145.23.62.rev.coltfrance.com. [62.23.145.78]) by smtp.gmail.com with ESMTPSA id k9sm26405823wrk.27.2017.10.05.05.50.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 05 Oct 2017 05:50:31 -0700 (PDT) From: Nelio Laranjeiro To: dev@dpdk.org Cc: adrien.mazarguil@6wind.com, yskoh@mellanox.com, ferruh.yigit@intel.com, stable@dpdk.org Date: Thu, 5 Oct 2017 14:49:40 +0200 Message-Id: X-Mailer: git-send-email 2.1.4 In-Reply-To: References: In-Reply-To: References: Subject: [dpdk-dev] [PATCH v2 08/30] net/mlx5: fix rxqs vector support verification X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 05 Oct 2017 12:50:33 -0000 The number of queues in DPDK does not means that the array of queue will be totally filled, those information are uncorrelated. The number of queues is provided in the port configuration whereas the array is filled by calling tx/rx_queue_setup(). As this number of queue is not increased or decrease according to tx/rx_queue_setup() or tx/rx_queue_release(), PMD must consider a queue may not be initialised in some position of the array. Fixes: 6cb559d67b83 ("net/mlx5: add vectorized Rx/Tx burst for x86") Cc: yskoh@mellanox.com Cc: stable@dpdk.org Signed-off-by: Nelio Laranjeiro --- drivers/net/mlx5/mlx5_rxtx_vec_sse.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_sse.c b/drivers/net/mlx5/mlx5_rxtx_vec_sse.c index 2750eac..20ea38e 100644 --- a/drivers/net/mlx5/mlx5_rxtx_vec_sse.c +++ b/drivers/net/mlx5/mlx5_rxtx_vec_sse.c @@ -1367,6 +1367,8 @@ priv_check_vec_rx_support(struct priv *priv) for (i = 0; i < priv->rxqs_n; ++i) { struct mlx5_rxq_data *rxq = (*priv->rxqs)[i]; + if (!rxq) + continue; if (rxq_check_vec_support(rxq) < 0) break; } -- 2.1.4