Intel SSE has __m128i, but ARMv8 has __uint128_t. So, add compat efsys_uint128_t to be used in driver source and have either __u128i or __uint128_t behind. Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com> Reviewed-by: Andy Moreton <amoreton@xilinx.com> --- drivers/common/sfc_efx/base/efx_types.h | 8 ++++---- drivers/common/sfc_efx/efsys.h | 19 ++++++++++--------- 2 files changed, 14 insertions(+), 13 deletions(-) diff --git a/drivers/common/sfc_efx/base/efx_types.h b/drivers/common/sfc_efx/base/efx_types.h index f7ec9a7..d67d07b 100644 --- a/drivers/common/sfc_efx/base/efx_types.h +++ b/drivers/common/sfc_efx/base/efx_types.h @@ -221,8 +221,8 @@ efx_word_t eo_word[8]; efx_dword_t eo_dword[4]; efx_qword_t eo_qword[2]; -#if EFSYS_HAS_SSE2_M128 - __m128i eo_u128[1]; +#if EFSYS_HAS_UINT128 + efsys_uint128_t eo_u128[1]; #endif #if EFSYS_HAS_UINT64 uint64_t eo_u64[2]; @@ -243,8 +243,8 @@ efx_dword_t ex_dword[8]; efx_qword_t ex_qword[4]; efx_oword_t ex_oword[2]; -#if EFSYS_HAS_SSE2_M128 - __m128i ex_u128[2]; +#if EFSYS_HAS_UINT128 + efsys_uint128_t ex_u128[2]; #endif #if EFSYS_HAS_UINT64 uint64_t ex_u64[4]; diff --git a/drivers/common/sfc_efx/efsys.h b/drivers/common/sfc_efx/efsys.h index bbe9f2e..139f4d8 100644 --- a/drivers/common/sfc_efx/efsys.h +++ b/drivers/common/sfc_efx/efsys.h @@ -39,7 +39,8 @@ #define EFSYS_HAS_UINT64 1 #define EFSYS_USE_UINT64 1 -#define EFSYS_HAS_SSE2_M128 1 +#define EFSYS_HAS_UINT128 1 +typedef __m128i efsys_uint128_t; #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN #define EFSYS_IS_BIG_ENDIAN 1 @@ -272,13 +273,13 @@ #define EFSYS_MEM_READO(_esmp, _offset, _eop) \ do { \ volatile uint8_t *_base = (_esmp)->esm_base; \ - volatile __m128i *_addr; \ + volatile efsys_uint128_t *_addr; \ \ _NOTE(CONSTANTCONDITION); \ SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset, \ sizeof(efx_oword_t))); \ \ - _addr = (volatile __m128i *)(_base + (_offset)); \ + _addr = (volatile efsys_uint128_t *)(_base + (_offset));\ (_eop)->eo_u128[0] = _addr[0]; \ \ EFSYS_PROBE5(mem_reado, unsigned int, (_offset), \ @@ -331,7 +332,7 @@ #define EFSYS_MEM_WRITEO(_esmp, _offset, _eop) \ do { \ volatile uint8_t *_base = (_esmp)->esm_base; \ - volatile __m128i *_addr; \ + volatile efsys_uint128_t *_addr; \ \ _NOTE(CONSTANTCONDITION); \ SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset, \ @@ -344,7 +345,7 @@ uint32_t, (_eop)->eo_u32[1], \ uint32_t, (_eop)->eo_u32[0]); \ \ - _addr = (volatile __m128i *)(_base + (_offset)); \ + _addr = (volatile efsys_uint128_t *)(_base + (_offset));\ _addr[0] = (_eop)->eo_u128[0]; \ \ _NOTE(CONSTANTCONDITION); \ @@ -445,7 +446,7 @@ #define EFSYS_BAR_READO(_esbp, _offset, _eop, _lock) \ do { \ volatile uint8_t *_base = (_esbp)->esb_base; \ - volatile __m128i *_addr; \ + volatile efsys_uint128_t *_addr; \ \ _NOTE(CONSTANTCONDITION); \ SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset, \ @@ -455,7 +456,7 @@ if (_lock) \ SFC_BAR_LOCK(_esbp); \ \ - _addr = (volatile __m128i *)(_base + (_offset)); \ + _addr = (volatile efsys_uint128_t *)(_base + (_offset));\ rte_rmb(); \ /* There is no rte_read128_relaxed() yet */ \ (_eop)->eo_u128[0] = _addr[0]; \ @@ -537,7 +538,7 @@ #define EFSYS_BAR_WRITEO(_esbp, _offset, _eop, _lock) \ do { \ volatile uint8_t *_base = (_esbp)->esb_base; \ - volatile __m128i *_addr; \ + volatile efsys_uint128_t *_addr; \ \ _NOTE(CONSTANTCONDITION); \ SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset, \ @@ -553,7 +554,7 @@ uint32_t, (_eop)->eo_u32[1], \ uint32_t, (_eop)->eo_u32[0]); \ \ - _addr = (volatile __m128i *)(_base + (_offset)); \ + _addr = (volatile efsys_uint128_t *)(_base + (_offset));\ /* There is no rte_write128_relaxed() yet */ \ _addr[0] = (_eop)->eo_u128[0]; \ rte_wmb(); \ -- 1.8.3.1
Prepare to support ARMv8. Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com> Reviewed-by: Andy Moreton <amoreton@xilinx.com> --- drivers/net/sfc/sfc_ef10.h | 4 ++-- drivers/net/sfc/sfc_ef10_tx.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/net/sfc/sfc_ef10.h b/drivers/net/sfc/sfc_ef10.h index 07c322f..7bca219 100644 --- a/drivers/net/sfc/sfc_ef10.h +++ b/drivers/net/sfc/sfc_ef10.h @@ -40,8 +40,8 @@ static inline void sfc_ef10_ev_qclear_cache_line(void *ptr) { - const __m128i val = _mm_set1_epi64x(UINT64_MAX); - __m128i *addr = ptr; + const efsys_uint128_t val = _mm_set1_epi64x(UINT64_MAX); + efsys_uint128_t *addr = ptr; unsigned int i; RTE_BUILD_BUG_ON(sizeof(val) > RTE_CACHE_LINE_SIZE); diff --git a/drivers/net/sfc/sfc_ef10_tx.c b/drivers/net/sfc/sfc_ef10_tx.c index 961689d..87fa40f 100644 --- a/drivers/net/sfc/sfc_ef10_tx.c +++ b/drivers/net/sfc/sfc_ef10_tx.c @@ -247,7 +247,7 @@ struct sfc_ef10_txq { */ rte_io_wmb(); - *(volatile __m128i *)txq->doorbell = oword.eo_u128[0]; + *(volatile efsys_uint128_t *)txq->doorbell = oword.eo_u128[0]; } static unsigned int -- 1.8.3.1
Enable the PMD build on aarch64. Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com> Reviewed-by: Andy Moreton <amoreton@xilinx.com> --- config/arm/meson.build | 1 - doc/guides/nics/features/sfc_efx.ini | 1 + doc/guides/rel_notes/release_20_11.rst | 1 + drivers/common/sfc_efx/efsys.h | 17 +++++++++++++++++ drivers/common/sfc_efx/meson.build | 4 ++-- drivers/net/sfc/meson.build | 4 ++-- drivers/net/sfc/sfc_ef10.h | 9 +++++++++ 7 files changed, 32 insertions(+), 5 deletions(-) diff --git a/config/arm/meson.build b/config/arm/meson.build index b49203f..13f42cd 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -22,7 +22,6 @@ flags_common_default = [ # ['RTE_ARM64_MEMCPY_STRICT_ALIGN', false], ['RTE_NET_FM10K', false], - ['RTE_NET_SFC_EFX', false], ['RTE_NET_AVP', false], ['RTE_SCHED_VECTOR', false], diff --git a/doc/guides/nics/features/sfc_efx.ini b/doc/guides/nics/features/sfc_efx.ini index eca1427..213b6e1 100644 --- a/doc/guides/nics/features/sfc_efx.ini +++ b/doc/guides/nics/features/sfc_efx.ini @@ -40,4 +40,5 @@ Multiprocess aware = Y BSD nic_uio = Y Linux UIO = Y Linux VFIO = Y +ARMv8 = Y x86-64 = Y diff --git a/doc/guides/rel_notes/release_20_11.rst b/doc/guides/rel_notes/release_20_11.rst index fa666e0..fcf206a 100644 --- a/doc/guides/rel_notes/release_20_11.rst +++ b/doc/guides/rel_notes/release_20_11.rst @@ -167,6 +167,7 @@ New Features * Added SR-IOV PF support * Added Alveo SN1000 SmartNICs (EF100 architecture) support including flow API transfer rules for switch HW offload + * Added ARMv8 support * **Updated Virtio driver.** diff --git a/drivers/common/sfc_efx/efsys.h b/drivers/common/sfc_efx/efsys.h index 139f4d8..a3ae313 100644 --- a/drivers/common/sfc_efx/efsys.h +++ b/drivers/common/sfc_efx/efsys.h @@ -39,8 +39,25 @@ #define EFSYS_HAS_UINT64 1 #define EFSYS_USE_UINT64 1 +/* + * __SSE2__ is defined by a compiler if target architecture supports + * Streaming SIMD Extensions 2 (SSE2). __m128i is a data type used + * by the extension instructions. + */ +#if defined(__SSE2__) #define EFSYS_HAS_UINT128 1 typedef __m128i efsys_uint128_t; +/* + * __int128 and unsigned __int128 are compiler extensions (built-in types). + * __SIZEOF_INT128__ is defined by the compiler if these data types are + * available. + */ +#elif defined(__SIZEOF_INT128__) +#define EFSYS_HAS_UINT128 1 +typedef unsigned __int128 efsys_uint128_t; +#else +#error Unsigned 128-bit width integers support is required +#endif #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN #define EFSYS_IS_BIG_ENDIAN 1 diff --git a/drivers/common/sfc_efx/meson.build b/drivers/common/sfc_efx/meson.build index b7a0763..6cb9f07 100644 --- a/drivers/common/sfc_efx/meson.build +++ b/drivers/common/sfc_efx/meson.build @@ -5,9 +5,9 @@ # This software was jointly developed between OKTET Labs (under contract # for Solarflare) and Solarflare Communications, Inc. -if arch_subdir != 'x86' or not dpdk_conf.get('RTE_ARCH_64') +if (arch_subdir != 'x86' or not dpdk_conf.get('RTE_ARCH_64')) and (arch_subdir != 'arm' or not host_machine.cpu_family().startswith('aarch64')) build = false - reason = 'only supported on x86_64' + reason = 'only supported on x86_64 and aarch64' endif extra_flags = [] diff --git a/drivers/net/sfc/meson.build b/drivers/net/sfc/meson.build index 42b184c..be888bd 100644 --- a/drivers/net/sfc/meson.build +++ b/drivers/net/sfc/meson.build @@ -6,9 +6,9 @@ # This software was jointly developed between OKTET Labs (under contract # for Solarflare) and Solarflare Communications, Inc. -if arch_subdir != 'x86' or not dpdk_conf.get('RTE_ARCH_64') +if (arch_subdir != 'x86' or not dpdk_conf.get('RTE_ARCH_64')) and (arch_subdir != 'arm' or not host_machine.cpu_family().startswith('aarch64')) build = false - reason = 'only supported on x86_64' + reason = 'only supported on x86_64 and aarch64' endif extra_flags = [] diff --git a/drivers/net/sfc/sfc_ef10.h b/drivers/net/sfc/sfc_ef10.h index 7bca219..e13f43f 100644 --- a/drivers/net/sfc/sfc_ef10.h +++ b/drivers/net/sfc/sfc_ef10.h @@ -22,6 +22,15 @@ #define SFC_EF10_EV_QCLEAR_MASK (~(SFC_EF10_EV_PER_CACHE_LINE - 1)) +/* + * Use simple libefx-based implementation of the + * sfc_ef10_ev_qclear_cache_line() if SSE2 is not available + * since optimized implementation uses __m128i intrinsics. + */ +#ifndef __SSE2__ +#define SFC_EF10_EV_QCLEAR_USE_EFX +#endif + #if defined(SFC_EF10_EV_QCLEAR_USE_EFX) static inline void sfc_ef10_ev_qclear_cache_line(void *ptr) -- 1.8.3.1
On 10/22/2020 1:24 PM, Andrew Rybchenko wrote:
> Intel SSE has __m128i, but ARMv8 has __uint128_t. So, add compat
> efsys_uint128_t to be used in driver source and have either __u128i
> or __uint128_t behind.
>
> Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
> Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Series applied to dpdk-next-net/main, thanks.
22/10/2020 14:24, Andrew Rybchenko:
> Intel SSE has __m128i, but ARMv8 has __uint128_t. So, add compat
> efsys_uint128_t to be used in driver source and have either __u128i
> or __uint128_t behind.
Could we do something in EAL for this common need?
<snip> > > 22/10/2020 14:24, Andrew Rybchenko: > > Intel SSE has __m128i, but ARMv8 has __uint128_t. So, add compat > > efsys_uint128_t to be used in driver source and have either __u128i or > > __uint128_t behind. > > Could we do something in EAL for this common need? rte_int128_t is defined in EAL. >