From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4E23EA0546; Fri, 30 Apr 2021 13:57:19 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id DCF3B40A4B; Fri, 30 Apr 2021 13:57:16 +0200 (CEST) Received: from szxga05-in.huawei.com (szxga05-in.huawei.com [45.249.212.191]) by mails.dpdk.org (Postfix) with ESMTP id 9F1FD40A4B for ; Fri, 30 Apr 2021 13:57:15 +0200 (CEST) Received: from DGGEMS412-HUB.china.huawei.com (unknown [172.30.72.58]) by szxga05-in.huawei.com (SkyGuard) with ESMTP id 4FWrPQ1CPSzPv55; Fri, 30 Apr 2021 19:54:02 +0800 (CST) Received: from [127.0.0.1] (10.40.190.165) by DGGEMS412-HUB.china.huawei.com (10.3.19.212) with Microsoft SMTP Server id 14.3.498.0; Fri, 30 Apr 2021 19:57:02 +0800 From: fengchengwen To: "dev@dpdk.org" CC: , , "humin29@huawei.com" Message-ID: Date: Fri, 30 Apr 2021 19:57:02 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.11.0 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.40.190.165] X-CFilter-Loop: Reflected Subject: [dpdk-dev] How to disable SVE auto vectorization while using GCC X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi, ALL We have a question for your help: 1. We have two platforms, both of which are ARM64, one of which supports both NEON and SVE, the other only support NEON. 2. We want to run on both platforms with a single binary file, and use the highest vector capability of the corresponding platform whenever possible. 3. So we build the DPDK program with -march=armv8-a+sve+crc (GCC 10.2). However, it is found that invalid instructions occur when the program runs on a machine that does not support SVE (pls see below). 4. The problem is caused by the introduction of SVE in GCC automatic vector optimization. So Is there a way to disable GCC automatic vector optimization or use only NEON to perform automatic vector optimization? BTW: we already test -fno-tree-vectorize (as link below) but found no effect. https://stackoverflow.com/questions/7778174/how-can-i-disable-vectorization-while-using-gcc The GDB output: EAL: Detected 128 lcore(s) EAL: Detected 4 NUMA nodes Option -w, --pci-whitelist is deprecated, use -a, --allow option instead Program received signal SIGILL, Illegal instruction. 0x0000000000671b88 in eal_adjust_config () (gdb) (gdb) where #0 0x0000000000671b88 in eal_adjust_config () #1 0x0000000000682840 in rte_eal_init () #2 0x000000000051c870 in main () (gdb) The disassembly output of eal_adjust_config: 671b7c: f8237a81 str x1, [x20, x3, lsl #3] 671b80: f110001f cmp x0, #0x400 671b84: 54ffff21 b.ne 671b68 // b.any 671b88: 043357f5 addvl x21, x19, #-1 671b8c: 043457e1 addvl x1, x20, #-1 671b90: 910562b5 add x21, x21, #0x158 671b94: 04e0e3e0 cntd x0 671b98: 914012b5 add x21, x21, #0x4, lsl #12 671b9c: 52800218 mov w24, #0x10 // #16 671ba0: 25d8e3e1 ptrue p1.d 671ba4: 25f80fe0 whilelo p0.d, wzr, w24 671ba8: a5e04020 ld1d {z0.d}, p0/z, [x1, x0, lsl #3] Best regards.