From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by dpdk.org (Postfix) with ESMTP id A04E92BA1 for ; Thu, 29 Sep 2016 20:15:47 +0200 (CEST) Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga103.fm.intel.com with ESMTP; 29 Sep 2016 11:15:46 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.31,268,1473145200"; d="scan'208";a="14716595" Received: from fyigit-mobl1.ger.corp.intel.com (HELO [10.237.221.7]) ([10.237.221.7]) by orsmga005.jf.intel.com with ESMTP; 29 Sep 2016 11:15:45 -0700 To: Jeff Guo , helin.zhang@intel.com, jingjing.wu@intel.com References: <1474887098-115474-1-git-send-email-jia.guo@intel.com> Cc: dev@dpdk.org From: Ferruh Yigit Message-ID: Date: Thu, 29 Sep 2016 19:15:43 +0100 User-Agent: Mozilla/5.0 (Windows NT 6.3; WOW64; rv:45.0) Gecko/20100101 Thunderbird/45.3.0 MIME-Version: 1.0 In-Reply-To: <1474887098-115474-1-git-send-email-jia.guo@intel.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 8bit Subject: Re: [dpdk-dev] [PATCH] drivers/i40e: fix the hash filter invalid calculation in X722 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 29 Sep 2016 18:15:48 -0000 On 9/26/2016 11:51 AM, Jeff Guo wrote: > As X722 extracts IPv4 header to Field Vector different with XL710/X710, > need to corresponding to modify the fields of IPv4 header in input set > to map different default Field Vector Table of different nics. > > Signed-off-by: Jeff Guo > --- > drivers/net/i40e/i40e_ethdev.c | 77 +++++++++++++++++++++++++++++++++++++++--- > 1 file changed, 73 insertions(+), 4 deletions(-) > > diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c > index b04c833..9b4c71f 100644 > --- a/drivers/net/i40e/i40e_ethdev.c > +++ b/drivers/net/i40e/i40e_ethdev.c > @@ -211,6 +211,18 @@ > #define I40E_REG_INSET_L3_SRC_IP4 0x0001800000000000ULL > /* Destination IPv4 address */ > #define I40E_REG_INSET_L3_DST_IP4 0x0000001800000000ULL > +#ifdef X722_SUPPORT > +/* Source IPv4 address for X722 */ > +#define I40E_X722_REG_INSET_L3_SRC_IP4 0x0006000000000000ULL These macros defined here within "#ifdef X722_SUPPORT" and later used unconditionally, this will cause a compile error when "X722_SUPPORT" not defined. > +/* Destination IPv4 address for X722 */ > +#define I40E_X722_REG_INSET_L3_DST_IP4 0x0000060000000000ULL > +/* IPv4 Type of Service (TOS) */ > +#define I40E_X722_REG_INSET_L3_IP4_TOS 0x0040000000000000ULL This value seems same as I40E_REG_INSET_L3_IP4_TOS, why creating a X722 version of this? > +/* IPv4 Protocol */ > +#define I40E_X722_REG_INSET_L3_IP4_PROTO 0x0010000000000000ULL > +/* IPv4 Time to Live */ > +#define I40E_X722_REG_INSET_L3_IP4_TTL 0x0010000000000000ULL > +#endif > /* IPv4 Type of Service (TOS) */ > #define I40E_REG_INSET_L3_IP4_TOS 0x0040000000000000ULL > /* IPv4 Protocol */ > @@ -7372,7 +7384,7 @@ i40e_parse_input_set(uint64_t *inset, > * and vice versa > */ > static uint64_t > -i40e_translate_input_set_reg(uint64_t input) > +i40e_translate_input_set_reg(enum i40e_mac_type type, uint64_t input) > { > uint64_t val = 0; > uint16_t i; > @@ -7419,14 +7431,70 @@ i40e_translate_input_set_reg(uint64_t input) > {I40E_INSET_FLEX_PAYLOAD_W8, I40E_REG_INSET_FLEX_PAYLOAD_WORD8}, > }; > > + static const struct { > + uint64_t inset; > + uint64_t inset_reg; Since creating second instance of this struct, why not extract strcut declaration? > + } inset_map1[] = { Is it possible to use more descriptive variable name, hard to distinguish diff between inset_map and inset_map1. > + {I40E_INSET_DMAC, I40E_REG_INSET_L2_DMAC}, > + {I40E_INSET_SMAC, I40E_REG_INSET_L2_SMAC}, > + {I40E_INSET_VLAN_OUTER, I40E_REG_INSET_L2_OUTER_VLAN}, > + {I40E_INSET_VLAN_INNER, I40E_REG_INSET_L2_INNER_VLAN}, > + {I40E_INSET_LAST_ETHER_TYPE, I40E_REG_INSET_LAST_ETHER_TYPE}, ----> > + {I40E_INSET_IPV4_SRC, I40E_X722_REG_INSET_L3_SRC_IP4}, > + {I40E_INSET_IPV4_DST, I40E_X722_REG_INSET_L3_DST_IP4}, > + {I40E_INSET_IPV4_TOS, I40E_X722_REG_INSET_L3_IP4_TOS}, > + {I40E_INSET_IPV4_PROTO, I40E_X722_REG_INSET_L3_IP4_PROTO}, > + {I40E_INSET_IPV4_TTL, I40E_X722_REG_INSET_L3_IP4_TTL}, <---- Since limited number of values are different from inset_map[], and most of them are duplication, is it possible to prevent duplication? > + {I40E_INSET_IPV6_SRC, I40E_REG_INSET_L3_SRC_IP6}, > + {I40E_INSET_IPV6_DST, I40E_REG_INSET_L3_DST_IP6}, > + {I40E_INSET_IPV6_TC, I40E_REG_INSET_L3_IP6_TC}, > + {I40E_INSET_IPV6_NEXT_HDR, I40E_REG_INSET_L3_IP6_NEXT_HDR}, > + {I40E_INSET_IPV6_HOP_LIMIT, I40E_REG_INSET_L3_IP6_HOP_LIMIT}, > + {I40E_INSET_SRC_PORT, I40E_REG_INSET_L4_SRC_PORT}, > + {I40E_INSET_DST_PORT, I40E_REG_INSET_L4_DST_PORT}, > + {I40E_INSET_SCTP_VT, I40E_REG_INSET_L4_SCTP_VERIFICATION_TAG}, > + {I40E_INSET_TUNNEL_ID, I40E_REG_INSET_TUNNEL_ID}, > + {I40E_INSET_TUNNEL_DMAC, > + I40E_REG_INSET_TUNNEL_L2_INNER_DST_MAC}, > + {I40E_INSET_TUNNEL_IPV4_DST, I40E_REG_INSET_TUNNEL_L3_DST_IP4}, > + {I40E_INSET_TUNNEL_IPV6_DST, I40E_REG_INSET_TUNNEL_L3_DST_IP6}, > + {I40E_INSET_TUNNEL_SRC_PORT, > + I40E_REG_INSET_TUNNEL_L4_UDP_SRC_PORT}, > + {I40E_INSET_TUNNEL_DST_PORT, > + I40E_REG_INSET_TUNNEL_L4_UDP_DST_PORT}, > + {I40E_INSET_VLAN_TUNNEL, I40E_REG_INSET_TUNNEL_VLAN}, > + {I40E_INSET_FLEX_PAYLOAD_W1, I40E_REG_INSET_FLEX_PAYLOAD_WORD1}, > + {I40E_INSET_FLEX_PAYLOAD_W2, I40E_REG_INSET_FLEX_PAYLOAD_WORD2}, > + {I40E_INSET_FLEX_PAYLOAD_W3, I40E_REG_INSET_FLEX_PAYLOAD_WORD3}, > + {I40E_INSET_FLEX_PAYLOAD_W4, I40E_REG_INSET_FLEX_PAYLOAD_WORD4}, > + {I40E_INSET_FLEX_PAYLOAD_W5, I40E_REG_INSET_FLEX_PAYLOAD_WORD5}, > + {I40E_INSET_FLEX_PAYLOAD_W6, I40E_REG_INSET_FLEX_PAYLOAD_WORD6}, > + {I40E_INSET_FLEX_PAYLOAD_W7, I40E_REG_INSET_FLEX_PAYLOAD_WORD7}, > + {I40E_INSET_FLEX_PAYLOAD_W8, I40E_REG_INSET_FLEX_PAYLOAD_WORD8}, > + }; > + > if (input == 0) > return val; > > /* Translate input set to register aware inset */ > +#ifdef X722_SUPPORT > + if (type == I40E_MAC_X722) { > + for (i = 0; i < RTE_DIM(inset_map1); i++) { > + if (input & inset_map1[i].inset) > + val |= inset_map1[i].inset_reg; > + } > + } else { > + for (i = 0; i < RTE_DIM(inset_map); i++) { > + if (input & inset_map[i].inset) > + val |= inset_map[i].inset_reg; > + } > + } > +#else > for (i = 0; i < RTE_DIM(inset_map); i++) { > if (input & inset_map[i].inset) > val |= inset_map[i].inset_reg; > } > +#endif What about something like this, to prevent duplication: inset_map_x = inset_map; #ifdef X722_SUPPORT if (type == I40E_MAC_X722) inset_map_x = inset_map1; #endif for (i = 0; i < RTE_DIM(inset_map_x); i++) { if (input & inset_map_x[i].inset) val |= inset_map_x[i].inset_reg; } > > return val; > } > @@ -7510,7 +7578,8 @@ i40e_filter_input_set_init(struct i40e_pf *pf) > I40E_INSET_MASK_NUM_REG); > if (num < 0) > return; > - inset_reg = i40e_translate_input_set_reg(input_set); > + inset_reg = i40e_translate_input_set_reg(hw->mac.type, > + input_set); > > i40e_check_write_reg(hw, I40E_PRTQF_FD_INSET(pctype, 0), > (uint32_t)(inset_reg & UINT32_MAX)); > @@ -7592,7 +7661,7 @@ i40e_hash_filter_inset_select(struct i40e_hw *hw, > if (num < 0) > return -EINVAL; > > - inset_reg |= i40e_translate_input_set_reg(input_set); > + inset_reg |= i40e_translate_input_set_reg(hw->mac.type, input_set); > > i40e_check_write_reg(hw, I40E_GLQF_HASH_INSET(0, pctype), > (uint32_t)(inset_reg & UINT32_MAX)); > @@ -7668,7 +7737,7 @@ i40e_fdir_filter_inset_select(struct i40e_pf *pf, > if (num < 0) > return -EINVAL; > > - inset_reg |= i40e_translate_input_set_reg(input_set); > + inset_reg |= i40e_translate_input_set_reg(hw->mac.type, input_set); > > i40e_check_write_reg(hw, I40E_PRTQF_FD_INSET(pctype, 0), > (uint32_t)(inset_reg & UINT32_MAX)); >