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To: Thomas Monjalon <thomas@monjalon.net>, "Min Hu (Connor)"
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 <2073087.ahSVXVslbx@thomas>
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From: Chengchang Tang <tangchengchang@huawei.com>
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Date: Thu, 22 Apr 2021 09:38:42 +0800
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Subject: Re: [dpdk-dev] [PATCH] examples/timer: fix incorrect time interval
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Hi
On 2021/4/22 2:34, Thomas Monjalon wrote:
> 15/04/2021 09:12, Min Hu (Connor):
>> From: Chengchang Tang <tangchengchang@huawei.com>
>>
>> Timer sample example assumes that the frequency of the timer is about
>> 2Ghz to control the period of calling rte_timer_manage(). But this
>> assumption is easy to fail. For example. the frequency of tsc on ARM64
>> is much less than 2Ghz.
> 
> So rte_timer_manage() will be called less often, yes.
> 
>> This patch uses the frequency of the current timer to calculate the
>> correct time interval to ensure consistent result on all platforms.
> 
> I am not sure about making the example more complex.
> What is the issue with the previous value?
>
In my understanding, the example should illustrate the standard usage of
related functions. Some of our customers did not know the difference in
tsc frequency between arm and x86 when using our SoC. As a result, some
misunderstanding are caused. So I think I could explain a more general
approach in the example, which will help these new users. When using a
timer, we must first know its frequency.  So I've added a frequency
acquisition process to the example, so that new users can realize that
there are differences between different platforms, so that they can design
more general programs.

>
> 
> 
> .
>