From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2A48DA0547; Thu, 22 Apr 2021 03:38:57 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 17E7A41C11; Thu, 22 Apr 2021 03:38:57 +0200 (CEST) Received: from szxga04-in.huawei.com (szxga04-in.huawei.com [45.249.212.190]) by mails.dpdk.org (Postfix) with ESMTP id D5AC841C08 for ; Thu, 22 Apr 2021 03:38:55 +0200 (CEST) Received: from DGGEMS411-HUB.china.huawei.com (unknown [172.30.72.60]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4FQg4Z1Bpgz16LHx; Thu, 22 Apr 2021 09:36:30 +0800 (CST) Received: from [127.0.0.1] (10.69.27.114) by DGGEMS411-HUB.china.huawei.com (10.3.19.211) with Microsoft SMTP Server id 14.3.498.0; Thu, 22 Apr 2021 09:38:43 +0800 To: Thomas Monjalon , "Min Hu (Connor)" References: <1618470748-12369-1-git-send-email-humin29@huawei.com> <2073087.ahSVXVslbx@thomas> CC: , , , , From: Chengchang Tang Message-ID: Date: Thu, 22 Apr 2021 09:38:42 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:45.0) Gecko/20100101 Thunderbird/45.7.1 MIME-Version: 1.0 In-Reply-To: <2073087.ahSVXVslbx@thomas> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.69.27.114] X-CFilter-Loop: Reflected Subject: Re: [dpdk-dev] [PATCH] examples/timer: fix incorrect time interval X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi On 2021/4/22 2:34, Thomas Monjalon wrote: > 15/04/2021 09:12, Min Hu (Connor): >> From: Chengchang Tang >> >> Timer sample example assumes that the frequency of the timer is about >> 2Ghz to control the period of calling rte_timer_manage(). But this >> assumption is easy to fail. For example. the frequency of tsc on ARM64 >> is much less than 2Ghz. > > So rte_timer_manage() will be called less often, yes. > >> This patch uses the frequency of the current timer to calculate the >> correct time interval to ensure consistent result on all platforms. > > I am not sure about making the example more complex. > What is the issue with the previous value? > In my understanding, the example should illustrate the standard usage of related functions. Some of our customers did not know the difference in tsc frequency between arm and x86 when using our SoC. As a result, some misunderstanding are caused. So I think I could explain a more general approach in the example, which will help these new users. When using a timer, we must first know its frequency. So I've added a frequency acquisition process to the example, so that new users can realize that there are differences between different platforms, so that they can design more general programs. > > > > . >