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Wed, 31 Aug 2022 12:44:01 -0400 X-MC-Unique: 9XA4gibDPRm2WaZicFBGsg-1 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.rdu2.redhat.com [10.11.54.7]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 1620A101A54E; Wed, 31 Aug 2022 16:44:01 +0000 (UTC) Received: from [10.39.208.41] (unknown [10.39.208.41]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 9E8291410DD5; Wed, 31 Aug 2022 16:43:58 +0000 (UTC) Message-ID: Date: Wed, 31 Aug 2022 18:43:57 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.12.0 To: "Chautru, Nicolas" , "dev@dpdk.org" , "thomas@monjalon.net" , "gakhil@marvell.com" , "hemant.agrawal@nxp.com" , "trix@redhat.com" , "Vargas, Hernan" Cc: "mdr@ashroe.eu" , "Richardson, Bruce" , "david.marchand@redhat.com" , "stephen@networkplumber.org" References: <1657238503-143836-1-git-send-email-nicolas.chautru@intel.com> <9087aa5a-6ba8-5df2-8a68-63926843ff7e@redhat.com> <5144a909-7e19-bcda-7bae-89b42fff100c@redhat.com> From: Maxime Coquelin Subject: Re: [PATCH v1 00/10] baseband/acc200 In-Reply-To: X-Scanned-By: MIMEDefang 2.85 on 10.11.54.7 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Language: en-US Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Hello Nicolas, On 8/30/22 21:45, Chautru, Nicolas wrote: > Hi Maxime, > >> -----Original Message----- >> From: Maxime Coquelin >> Sent: Tuesday, August 30, 2022 12:45 AM >> To: Chautru, Nicolas ; dev@dpdk.org; >> thomas@monjalon.net; gakhil@marvell.com; hemant.agrawal@nxp.com; >> trix@redhat.com; Vargas, Hernan >> Cc: mdr@ashroe.eu; Richardson, Bruce ; >> david.marchand@redhat.com; stephen@networkplumber.org >> Subject: Re: [PATCH v1 00/10] baseband/acc200 >> >> Hi Nicolas, >> >> On 7/12/22 15:48, Maxime Coquelin wrote: >>> Hi Nicolas, Hernan, >>> >>> (Adding Hernan in the recipients list) >>> >>> On 7/8/22 02:01, Nicolas Chautru wrote: >>>> This is targeting 22.11 and includes the PMD for the integrated >>>> accelerator on Intel Xeon SPR-EEC. >>>> There is a dependency on that parallel serie still in-flight which >>>> extends the bbdev api >>>> https://patches.dpdk.org/project/dpdk/list/?series=23894 >>>> >>>> I will be offline for a few weeks for the summer break but Hernan >>>> will cover for me during that time if required. >>>> >>>> Thanks >>>> Nic >>>> >>>> Nicolas Chautru (10): >>>>    baseband/acc200: introduce PMD for ACC200 >>>>    baseband/acc200: add HW register definitions >>>>    baseband/acc200: add info get function >>>>    baseband/acc200: add queue configuration >>>>    baseband/acc200: add LDPC processing functions >>>>    baseband/acc200: add LTE processing functions >>>>    baseband/acc200: add support for FFT operations >>>>    baseband/acc200: support interrupt >>>>    baseband/acc200: add device status and vf2pf comms >>>>    baseband/acc200: add PF configure companion function >>>> >>>>   MAINTAINERS                              |    3 + >>>>   app/test-bbdev/meson.build               |    3 + >>>>   app/test-bbdev/test_bbdev_perf.c         |   76 + >>>>   doc/guides/bbdevs/acc200.rst             |  244 ++ >>>>   doc/guides/bbdevs/index.rst              |    1 + >>>>   drivers/baseband/acc200/acc200_pf_enum.h |  468 +++ >>>>   drivers/baseband/acc200/acc200_pmd.h     |  690 ++++ >>>>   drivers/baseband/acc200/acc200_vf_enum.h |   89 + >>>>   drivers/baseband/acc200/meson.build      |    8 + >>>>   drivers/baseband/acc200/rte_acc200_cfg.h |  115 + >>>>   drivers/baseband/acc200/rte_acc200_pmd.c | 5403 >>>> ++++++++++++++++++++++++++++++ >>>>   drivers/baseband/acc200/version.map      |   10 + >>>>   drivers/baseband/meson.build             |    1 + >>>>   13 files changed, 7111 insertions(+) >>>>   create mode 100644 doc/guides/bbdevs/acc200.rst >>>>   create mode 100644 drivers/baseband/acc200/acc200_pf_enum.h >>>>   create mode 100644 drivers/baseband/acc200/acc200_pmd.h >>>>   create mode 100644 drivers/baseband/acc200/acc200_vf_enum.h >>>>   create mode 100644 drivers/baseband/acc200/meson.build >>>>   create mode 100644 drivers/baseband/acc200/rte_acc200_cfg.h >>>>   create mode 100644 drivers/baseband/acc200/rte_acc200_pmd.c >>>>   create mode 100644 drivers/baseband/acc200/version.map >>>> >>> >>> Comparing ACC200 & ACC100 header files, I understand ACC200 is an >>> evolution of the ACC10x family. The FEC bits are really close, ACC200 >>> main addition seems to be FFT acceleration which could be handled in >>> ACC10x driver based on device ID. >>> >>> I think both drivers have to be merged in order to avoid code >>> duplication. That's how other families of devices (e.g. i40e) are >>> handled. >> >> I haven't seen your reply on this point. >> Do you confirm you are working on a single driver for ACC family in order to >> avoid code duplication? >> > > The implementation is based on distinct ACC100 and ACC200 drivers. The 2 devices are fundamentally different generation, processes and IP. > MountBryce is an eASIC device over PCIe while ACC200 is an integrated accelerator on Xeon CPU. The underlying technology does not matter much. For example we use same Virtio driver for SW emulated devices and fully HW offloaded ones. I have spent some time today comparing the drivers and what I can see is the ACC200 driver is a copy-paste of the ACC100, modulo FFT addition and other small changes that I think could be handled dynamically based on capabilities flags and device ID. > The actual implementation are not the same, underlying IP are all distinct even if many of the descriptor format have similarities. > The actual capabilities of the acceleration are different and/or new. New capabilities should be backed by device capabilities flags. > The workaround and silicon errata are also different causing different limitation and implementation in the driver (see the serie with ongoing changes for ACC100 in parallel). > This is fundamentally distinct from ACC101 which was a derivative product from ACC100 and where it made sense to share implementation between ACC100 and ACC101. > So in a nutshell these 2 devices and drivers are 2 different beasts and the intention is to keep them intentionally separate as in the serie. > Let me know if unclear, thanks! Thanks for the information. I still think it should be a single driver, I would appreciate a second opinion. Thomas, Bruce, Stephen, do you have time to have a look? Thanks, Maxime > Thanks > Nic > > >> Maxime >> >>> Thanks, >>> Maxime >