From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2294FA0547; Wed, 21 Apr 2021 16:35:46 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 106CE41AC8; Wed, 21 Apr 2021 16:35:46 +0200 (CEST) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by mails.dpdk.org (Postfix) with ESMTP id 78E44410F9 for ; Wed, 21 Apr 2021 16:35:44 +0200 (CEST) IronPort-SDR: BH2WMsd+w5SN6uKna3+kUbpYKi+d/a7xoxx+9kyxlR+Bz9aPRLGYcbsQ+9iJobI7ettDmBvkvG fXWKrlbPexhQ== X-IronPort-AV: E=McAfee;i="6200,9189,9961"; a="195264881" X-IronPort-AV: E=Sophos;i="5.82,240,1613462400"; d="scan'208";a="195264881" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Apr 2021 07:35:44 -0700 IronPort-SDR: RxevndMADMZQ4eTF7RRY9mE3s4N3bsM87XQK69GXtMwOA2RTgUB6nDlSfu4zVpZT/7f6iT4Jy5 QBjeJUynwAFQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,240,1613462400"; d="scan'208";a="427538824" Received: from fmsmsx603.amr.corp.intel.com ([10.18.126.83]) by orsmga008.jf.intel.com with ESMTP; 21 Apr 2021 07:35:43 -0700 Received: from shsmsx604.ccr.corp.intel.com (10.109.6.214) by fmsmsx603.amr.corp.intel.com (10.18.126.83) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2106.2; Wed, 21 Apr 2021 07:35:42 -0700 Received: from shsmsx601.ccr.corp.intel.com (10.109.6.141) by SHSMSX604.ccr.corp.intel.com (10.109.6.214) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2106.2; Wed, 21 Apr 2021 22:35:40 +0800 Received: from shsmsx601.ccr.corp.intel.com ([10.109.6.141]) by SHSMSX601.ccr.corp.intel.com ([10.109.6.141]) with mapi id 15.01.2106.013; Wed, 21 Apr 2021 22:35:40 +0800 From: "Zhang, Qi Z" To: "Xing, Beilei" , "Yang, MurphyX" , "dev@dpdk.org" CC: "Yang, Qiming" , "Guo, Jia" , "Yang, SteveX" , "Zhang, RobinX" Thread-Topic: [PATCH v3] net/i40e: fix FDIR issue for common PCTYPEs Thread-Index: AQHXNmzZX8BWTnLKj0a+SFRjComkuaq/Ckcg Date: Wed, 21 Apr 2021 14:35:40 +0000 Message-ID: References: <20210421020830.4989-1-murphyx.yang@intel.com> <20210421034403.8894-1-murphyx.yang@intel.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-reaction: no-action dlp-version: 11.5.1.3 dlp-product: dlpe-windows x-originating-ip: [10.239.127.36] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v3] net/i40e: fix FDIR issue for common PCTYPEs X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: dev On Behalf Of Xing, Beilei > Sent: Wednesday, April 21, 2021 1:11 PM > To: Yang, MurphyX ; dev@dpdk.org > Cc: Yang, Qiming ; Guo, Jia ; > Yang, SteveX ; Zhang, RobinX > > Subject: Re: [dpdk-dev] [PATCH v3] net/i40e: fix FDIR issue for common > PCTYPEs >=20 >=20 >=20 > > -----Original Message----- > > From: Yang, MurphyX > > Sent: Wednesday, April 21, 2021 11:44 AM > > To: dev@dpdk.org > > Cc: Yang, Qiming ; Guo, Jia > > ; Xing, Beilei ; Yang, > > SteveX ; Zhang, RobinX > > ; Yang, MurphyX > > Subject: [PATCH v3] net/i40e: fix FDIR issue for common PCTYPEs > > > > Currently, FDIR doesn't work for all common PCTYPEs, the root cause is > > that input set is not configured. > > > > Fixes: 4a072ad43442 ("net/i40e: fix flow director config after flow > > validate") > > Signed-off-by: Murphy Yang > > --- > > drivers/net/i40e/i40e_fdir.c | 25 +++++++++++++------------ > > 1 file changed, 13 insertions(+), 12 deletions(-) > > > > diff --git a/drivers/net/i40e/i40e_fdir.c > > b/drivers/net/i40e/i40e_fdir.c index > > da089baa4d..ed1c60af99 100644 > > --- a/drivers/net/i40e/i40e_fdir.c > > +++ b/drivers/net/i40e/i40e_fdir.c > > @@ -1607,8 +1607,10 @@ i40e_flow_set_fdir_inset(struct i40e_pf *pf, > > > > /* Check if the configuration is conflicted */ > > if (pf->fdir.inset_flag[pctype] && > > - memcmp(&pf->fdir.input_set[pctype], &input_set, sizeof(uint64_t))= ) > > - return -1; > > + memcmp(&pf->fdir.input_set[pctype], &input_set, > > +sizeof(uint64_t))) > > { > > + PMD_DRV_LOG(ERR, "Conflict with the first rule's input set."); > > + return -EINVAL; > > + } > > > > if (pf->fdir.inset_flag[pctype] && > > !memcmp(&pf->fdir.input_set[pctype], &input_set, > > sizeof(uint64_t))) @@ -1616,8 +1618,10 @@ > > i40e_flow_set_fdir_inset(struct i40e_pf *pf, > > > > num =3D i40e_generate_inset_mask_reg(hw, input_set, mask_reg, > > > > I40E_INSET_MASK_NUM_REG); > > - if (num < 0) > > + if (num < 0) { > > + PMD_DRV_LOG(ERR, "Invalid pattern mask."); > > return -EINVAL; > > + } > > > > if (pf->support_multi_driver) { > > for (i =3D 0; i < num; i++) > > @@ -1762,18 +1766,15 @@ i40e_flow_add_del_fdir_filter(struct > > rte_eth_dev *dev, > > i40e_fdir_filter_convert(filter, &check_filter); > > > > if (add) { > > - if (filter->input.flow_ext.is_flex_flow) { > > + /* configure the input set for common PCTYPEs*/ > > + if (!filter->input.flow_ext.customized_pctype) { > > ret =3D i40e_flow_set_fdir_inset(pf, pctype, > > filter->input.flow_ext.input_set); > > - if (ret =3D=3D -1) { > > - PMD_DRV_LOG(ERR, "Conflict with the" > > - " first rule's input set."); > > - return -EINVAL; > > - } else if (ret =3D=3D -EINVAL) { > > - PMD_DRV_LOG(ERR, "Invalid pattern mask."); > > - return -EINVAL; > > - } > > + if (ret < 0) > > + return ret; > > + } > > > > + if (filter->input.flow_ext.is_flex_flow) { > > for (i =3D 0; i < filter->input.flow_ext.raw_id; i++) { > > layer_idx =3D filter->input.flow_ext.layer_idx; > > field_idx =3D layer_idx * I40E_MAX_FLXPLD_FIED > > + i; > > -- > > 2.17.1 >=20 > Acked-by: Beilei Xing Applied to dpdk-next-net-intel. Thanks Qi