From: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
To: dev@dpdk.org
Cc: Nirranjan Kirubaharan <nirranjan@chelsio.com>,
Indranil Choudhury <indranil@chelsio.com>,
Kumar Sanghvi <kumaras@chelsio.com>,
Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Subject: [dpdk-dev] [PATCH 09/13] cxgbe: update RXQ channel mapping for Chelsio T6
Date: Sat, 27 May 2017 09:16:24 +0530 [thread overview]
Message-ID: <df9c6411ad8c5a9b09cbcdfdf51ffa8e5c748969.1495856462.git.rahul.lakkireddy@chelsio.com> (raw)
In-Reply-To: <cover.1495856462.git.rahul.lakkireddy@chelsio.com>
In-Reply-To: <cover.1495856462.git.rahul.lakkireddy@chelsio.com>
Update MPS buffer groups and TP ingress channel congestion map to
correct RXQ allocation for Chelsio T6.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
---
drivers/net/cxgbe/base/common.h | 3 +-
drivers/net/cxgbe/base/t4_hw.c | 85 ++++++++++++++++++++++++++++++++++++----
drivers/net/cxgbe/cxgbe_ethdev.c | 4 +-
3 files changed, 81 insertions(+), 11 deletions(-)
diff --git a/drivers/net/cxgbe/base/common.h b/drivers/net/cxgbe/base/common.h
index dd8da0a..9383628 100644
--- a/drivers/net/cxgbe/base/common.h
+++ b/drivers/net/cxgbe/base/common.h
@@ -384,7 +384,8 @@ int t4_get_vpd_params(struct adapter *adapter, struct vpd_params *p);
int t4_read_flash(struct adapter *adapter, unsigned int addr,
unsigned int nwords, u32 *data, int byte_oriented);
int t4_flash_cfg_addr(struct adapter *adapter);
-unsigned int t4_get_mps_bg_map(struct adapter *adapter, int idx);
+unsigned int t4_get_mps_bg_map(struct adapter *adapter, unsigned int pidx);
+unsigned int t4_get_tp_ch_map(struct adapter *adapter, unsigned int pidx);
const char *t4_get_port_type_description(enum fw_port_type port_type);
void t4_get_port_stats(struct adapter *adap, int idx, struct port_stats *p);
void t4_get_port_stats_offset(struct adapter *adap, int idx,
diff --git a/drivers/net/cxgbe/base/t4_hw.c b/drivers/net/cxgbe/base/t4_hw.c
index 787494b..4e1545a 100644
--- a/drivers/net/cxgbe/base/t4_hw.c
+++ b/drivers/net/cxgbe/base/t4_hw.c
@@ -2844,21 +2844,90 @@ const char *t4_get_port_type_description(enum fw_port_type port_type)
/**
* t4_get_mps_bg_map - return the buffer groups associated with a port
* @adap: the adapter
- * @idx: the port index
+ * @pidx: the port index
*
* Returns a bitmap indicating which MPS buffer groups are associated
* with the given port. Bit i is set if buffer group i is used by the
* port.
*/
-unsigned int t4_get_mps_bg_map(struct adapter *adap, int idx)
+unsigned int t4_get_mps_bg_map(struct adapter *adap, unsigned int pidx)
+{
+ unsigned int chip_version = CHELSIO_CHIP_VERSION(adap->params.chip);
+ unsigned int nports = 1 << G_NUMPORTS(t4_read_reg(adap,
+ A_MPS_CMN_CTL));
+
+ if (pidx >= nports) {
+ dev_warn(adap, "MPS Port Index %d >= Nports %d\n",
+ pidx, nports);
+ return 0;
+ }
+
+ switch (chip_version) {
+ case CHELSIO_T4:
+ case CHELSIO_T5:
+ switch (nports) {
+ case 1: return 0xf;
+ case 2: return 3 << (2 * pidx);
+ case 4: return 1 << pidx;
+ }
+ break;
+
+ case CHELSIO_T6:
+ switch (nports) {
+ case 2: return 1 << (2 * pidx);
+ }
+ break;
+ }
+
+ dev_err(adap, "Need MPS Buffer Group Map for Chip %0x, Nports %d\n",
+ chip_version, nports);
+ return 0;
+}
+
+/**
+ * t4_get_tp_ch_map - return TP ingress channels associated with a port
+ * @adapter: the adapter
+ * @pidx: the port index
+ *
+ * Returns a bitmap indicating which TP Ingress Channels are associated with
+ * a given Port. Bit i is set if TP Ingress Channel i is used by the Port.
+ */
+unsigned int t4_get_tp_ch_map(struct adapter *adapter, unsigned int pidx)
{
- u32 n = G_NUMPORTS(t4_read_reg(adap, A_MPS_CMN_CTL));
+ unsigned int chip_version = CHELSIO_CHIP_VERSION(adapter->params.chip);
+ unsigned int nports = 1 << G_NUMPORTS(t4_read_reg(adapter,
+ A_MPS_CMN_CTL));
+
+ if (pidx >= nports) {
+ dev_warn(adap, "TP Port Index %d >= Nports %d\n",
+ pidx, nports);
+ return 0;
+ }
+
+ switch (chip_version) {
+ case CHELSIO_T4:
+ case CHELSIO_T5:
+ /* Note that this happens to be the same values as the MPS
+ * Buffer Group Map for these Chips. But we replicate the code
+ * here because they're really separate concepts.
+ */
+ switch (nports) {
+ case 1: return 0xf;
+ case 2: return 3 << (2 * pidx);
+ case 4: return 1 << pidx;
+ }
+ break;
+
+ case CHELSIO_T6:
+ switch (nports) {
+ case 2: return 1 << pidx;
+ }
+ break;
+ }
- if (n == 0)
- return idx == 0 ? 0xf : 0;
- if (n == 1)
- return idx < 2 ? (3 << (2 * idx)) : 0;
- return 1 << idx;
+ dev_err(adapter, "Need TP Channel Map for Chip %0x, Nports %d\n",
+ chip_version, nports);
+ return 0;
}
/**
diff --git a/drivers/net/cxgbe/cxgbe_ethdev.c b/drivers/net/cxgbe/cxgbe_ethdev.c
index 2e2f2cf..e51becb 100644
--- a/drivers/net/cxgbe/cxgbe_ethdev.c
+++ b/drivers/net/cxgbe/cxgbe_ethdev.c
@@ -1,7 +1,7 @@
/*-
* BSD LICENSE
*
- * Copyright(c) 2014-2016 Chelsio Communications.
+ * Copyright(c) 2014-2017 Chelsio Communications.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -617,7 +617,7 @@ static int cxgbe_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
err = t4_sge_alloc_rxq(adapter, &rxq->rspq, false, eth_dev, msi_idx,
&rxq->fl, t4_ethrx_handler,
- t4_get_mps_bg_map(adapter, pi->tx_chan), mp,
+ t4_get_tp_ch_map(adapter, pi->tx_chan), mp,
queue_idx, socket_id);
dev_debug(adapter, "%s: err = %d; port_id = %d; cntxt_id = %u\n",
--
2.5.3
next prev parent reply other threads:[~2017-05-27 5:46 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-27 3:46 [dpdk-dev] [PATCH 00/13] cxgbe: add support for Chelsio T6 family of adapters Rahul Lakkireddy
2017-05-27 3:46 ` [dpdk-dev] [PATCH 01/13] cxgbe: add support to run Chelsio T6 cards Rahul Lakkireddy
2017-05-30 10:34 ` Ferruh Yigit
2017-05-27 3:46 ` [dpdk-dev] [PATCH 02/13] cxgbe: update register dump Rahul Lakkireddy
2017-05-27 3:46 ` [dpdk-dev] [PATCH 03/13] cxgbe: update flash part information Rahul Lakkireddy
2017-05-27 3:46 ` [dpdk-dev] [PATCH 04/13] cxgbe: grab available ports after firmware reset Rahul Lakkireddy
2017-05-27 3:46 ` [dpdk-dev] [PATCH 05/13] cxgbe: update link speeds and port modules Rahul Lakkireddy
2017-05-30 10:37 ` Ferruh Yigit
2017-05-27 3:46 ` [dpdk-dev] [PATCH 06/13] cxgbe: add forward error correction support Rahul Lakkireddy
2017-05-27 3:46 ` [dpdk-dev] [PATCH 07/13] cxgbe: update hardware info prints Rahul Lakkireddy
2017-05-27 3:46 ` [dpdk-dev] [PATCH 08/13] cxgbe: update TX path for Chelsio T6 Rahul Lakkireddy
2017-05-27 3:46 ` Rahul Lakkireddy [this message]
2017-05-27 3:46 ` [dpdk-dev] [PATCH 10/13] cxgbe: update RX " Rahul Lakkireddy
2017-05-27 3:46 ` [dpdk-dev] [PATCH 11/13] cxgbe: add compressed error vector Rahul Lakkireddy
2017-05-27 3:46 ` [dpdk-dev] [PATCH 12/13] cxgbe: fix port statistics Rahul Lakkireddy
2017-05-27 3:46 ` [dpdk-dev] [PATCH 13/13] cxgbe: remove RTE_PCI_DRV_INTR_LSC from driver flags Rahul Lakkireddy
2017-05-30 10:28 ` [dpdk-dev] [PATCH 00/13] cxgbe: add support for Chelsio T6 family of adapters Thomas Monjalon
2017-06-01 16:02 ` Rahul Lakkireddy
2017-05-30 10:39 ` Ferruh Yigit
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=df9c6411ad8c5a9b09cbcdfdf51ffa8e5c748969.1495856462.git.rahul.lakkireddy@chelsio.com \
--to=rahul.lakkireddy@chelsio.com \
--cc=dev@dpdk.org \
--cc=indranil@chelsio.com \
--cc=kumaras@chelsio.com \
--cc=nirranjan@chelsio.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).