From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id B17ADA04F6; Tue, 7 Jan 2020 14:57:45 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 137DB1D6F7; Tue, 7 Jan 2020 14:57:45 +0100 (CET) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id C57B71D6F6 for ; Tue, 7 Jan 2020 14:57:42 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 07 Jan 2020 05:57:41 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,406,1571727600"; d="scan'208";a="421078806" Received: from fyigit-mobl.ger.corp.intel.com (HELO [10.237.221.35]) ([10.237.221.35]) by fmsmga005.fm.intel.com with ESMTP; 07 Jan 2020 05:57:37 -0800 To: "Sebastian, Selwin" , "dev@dpdk.org" References: <20191210152915.9544-1-Selwin.Sebastian@amd.com> From: Ferruh Yigit Autocrypt: addr=ferruh.yigit@intel.com; prefer-encrypt=mutual; keydata= mQINBFXZCFABEADCujshBOAaqPZpwShdkzkyGpJ15lmxiSr3jVMqOtQS/sB3FYLT0/d3+bvy qbL9YnlbPyRvZfnP3pXiKwkRoR1RJwEo2BOf6hxdzTmLRtGtwWzI9MwrUPj6n/ldiD58VAGQ +iR1I/z9UBUN/ZMksElA2D7Jgg7vZ78iKwNnd+vLBD6I61kVrZ45Vjo3r+pPOByUBXOUlxp9 GWEKKIrJ4eogqkVNSixN16VYK7xR+5OUkBYUO+sE6etSxCr7BahMPKxH+XPlZZjKrxciaWQb +dElz3Ab4Opl+ZT/bK2huX+W+NJBEBVzjTkhjSTjcyRdxvS1gwWRuXqAml/sh+KQjPV1PPHF YK5LcqLkle+OKTCa82OvUb7cr+ALxATIZXQkgmn+zFT8UzSS3aiBBohg3BtbTIWy51jNlYdy ezUZ4UxKSsFuUTPt+JjHQBvF7WKbmNGS3fCid5Iag4tWOfZoqiCNzxApkVugltxoc6rG2TyX CmI2rP0mQ0GOsGXA3+3c1MCdQFzdIn/5tLBZyKy4F54UFo35eOX8/g7OaE+xrgY/4bZjpxC1 1pd66AAtKb3aNXpHvIfkVV6NYloo52H+FUE5ZDPNCGD0/btFGPWmWRmkPybzColTy7fmPaGz cBcEEqHK4T0aY4UJmE7Ylvg255Kz7s6wGZe6IR3N0cKNv++O7QARAQABtCVGZXJydWggWWln aXQgPGZlcnJ1aC55aWdpdEBpbnRlbC5jb20+iQJUBBMBCgA+AhsDAh4BAheABQsJCAcDBRUK CQgLBRYCAwEAFiEE0jZTh0IuwoTjmYHH+TPrQ98TYR8FAl1meboFCQlupOoACgkQ+TPrQ98T YR9ACBAAv2tomhyxY0Tp9Up7mNGLfEdBu/7joB/vIdqMRv63ojkwr9orQq5V16V/25+JEAD0 60cKodBDM6HdUvqLHatS8fooWRueSXHKYwJ3vxyB2tWDyZrLzLI1jxEvunGodoIzUOtum0Ce gPynnfQCelXBja0BwLXJMplM6TY1wXX22ap0ZViC0m714U5U4LQpzjabtFtjT8qOUR6L7hfy YQ72PBuktGb00UR/N5UrR6GqB0x4W41aZBHXfUQnvWIMmmCrRUJX36hOTYBzh+x86ULgg7H2 1499tA4o6rvE13FiGccplBNWCAIroAe/G11rdoN5NBgYVXu++38gTa/MBmIt6zRi6ch15oLA Ln2vHOdqhrgDuxjhMpG2bpNE36DG/V9WWyWdIRlz3NYPCDM/S3anbHlhjStXHOz1uHOnerXM 1jEjcsvmj1vSyYoQMyRcRJmBZLrekvgZeh7nJzbPHxtth8M7AoqiZ/o/BpYU+0xZ+J5/szWZ aYxxmIRu5ejFf+Wn9s5eXNHmyqxBidpCWvcbKYDBnkw2+Y9E5YTpL0mS0dCCOlrO7gca27ux ybtbj84aaW1g0CfIlUnOtHgMCmz6zPXThb+A8H8j3O6qmPoVqT3qnq3Uhy6GOoH8Fdu2Vchh TWiF5yo+pvUagQP6LpslffufSnu+RKAagkj7/RSuZV25Ag0EV9ZMvgEQAKc0Db17xNqtSwEv mfp4tkddwW9XA0tWWKtY4KUdd/jijYqc3fDD54ESYpV8QWj0xK4YM0dLxnDU2IYxjEshSB1T qAatVWz9WtBYvzalsyTqMKP3w34FciuL7orXP4AibPtrHuIXWQOBECcVZTTOdZYGAzaYzxiA ONzF9eTiwIqe9/oaOjTwTLnOarHt16QApTYQSnxDUQljeNvKYt1lZE/gAUUxNLWsYyTT+22/ vU0GDUahsJxs1+f1yEr+OGrFiEAmqrzpF0lCS3f/3HVTU6rS9cK3glVUeaTF4+1SK5ZNO35p iVQCwphmxa+dwTG/DvvHYCtgOZorTJ+OHfvCnSVjsM4kcXGjJPy3JZmUtyL9UxEbYlrffGPQ I3gLXIGD5AN5XdAXFCjjaID/KR1c9RHd7Oaw0Pdcq9UtMLgM1vdX8RlDuMGPrj5sQrRVbgYH fVU/TQCk1C9KhzOwg4Ap2T3tE1umY/DqrXQgsgH71PXFucVjOyHMYXXugLT8YQ0gcBPHy9mZ qw5mgOI5lCl6d4uCcUT0l/OEtPG/rA1lxz8ctdFBVOQOxCvwRG2QCgcJ/UTn5vlivul+cThi 6ERPvjqjblLncQtRg8izj2qgmwQkvfj+h7Ex88bI8iWtu5+I3K3LmNz/UxHBSWEmUnkg4fJl Rr7oItHsZ0ia6wWQ8lQnABEBAAGJAjwEGAEKACYCGwwWIQTSNlOHQi7ChOOZgcf5M+tD3xNh HwUCXWZ5wAUJB3FgggAKCRD5M+tD3xNhH2O+D/9OEz62YuJQLuIuOfL67eFTIB5/1+0j8Tsu o2psca1PUQ61SZJZOMl6VwNxpdvEaolVdrpnSxUF31kPEvR0Igy8HysQ11pj8AcgH0a9FrvU /8k2Roccd2ZIdpNLkirGFZR7LtRw41Kt1Jg+lafI0efkiHKMT/6D/P1EUp1RxOBNtWGV2hrd 0Yg9ds+VMphHHU69fDH02SwgpvXwG8Qm14Zi5WQ66R4CtTkHuYtA63sS17vMl8fDuTCtvfPF HzvdJLIhDYN3Mm1oMjKLlq4PUdYh68Fiwm+boJoBUFGuregJFlO3hM7uHBDhSEnXQr5mqpPM 6R/7Q5BjAxrwVBisH0yQGjsWlnysRWNfExAE2sRePSl0or9q19ddkRYltl6X4FDUXy2DTXa9 a+Fw4e1EvmcF3PjmTYs9IE3Vc64CRQXkhujcN4ZZh5lvOpU8WgyDxFq7bavFnSS6kx7Tk29/ wNJBp+cf9qsQxLbqhW5kfORuZGecus0TLcmpZEFKKjTJBK9gELRBB/zoN3j41hlEl7uTUXTI JQFLhpsFlEdKLujyvT/aCwP3XWT+B2uZDKrMAElF6ltpTxI53JYi22WO7NH7MR16Fhi4R6vh FHNBOkiAhUpoXRZXaCR6+X4qwA8CwHGqHRBfYFSU/Ulq1ZLR+S3hNj2mbnSx0lBs1eEqe2vh cA== Message-ID: Date: Tue, 7 Jan 2020 13:57:36 +0000 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Subject: Re: [dpdk-dev] [PATCH v1] net/axgbe: Add a HW quirk for register definitions X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On 12/17/2019 6:44 AM, Sebastian, Selwin wrote: > [AMD Official Use Only - Internal Distribution Only] > > Hi Ferruh, > Current driver was developed for EPYC 3000 processors. New processors V1000/R1000 is also using the same PCI id for axgbe but register definitions for determining the window settings for indirect PCS access is changed. In order to identify processor, we are adding a quirk. > 15d0 is the pci id for V1000/R1000/Raven root complex( https://pci-ids.ucw.cz/read/PC/1022 ). Hence read pci-id of root complex to determine which processor and set the registers accordingly. > Got it, it is better to add a define for 0x15d0 with an explanation, and for the root complex device use a more descriptive variable name that 'pdev'. But still it is not really good idea to access the pci device list, isn't there any other way to differentiate the devices, sub-device id etc? And how does linux driver manages this? And is it guaranteed that root complex device always will be the first device? > Thanks and Regards > Selwin Sebastian >   > > -----Original Message----- > From: Ferruh Yigit > Sent: Wednesday, December 11, 2019 5:12 PM > To: Sebastian, Selwin ; dev@dpdk.org > Subject: Re: [dpdk-dev] [PATCH v1] net/axgbe: Add a HW quirk for register definitions > > [CAUTION: External Email] > > On 12/10/2019 3:29 PM, Selwin Sebastian wrote: >> V1000/R1000 processors are using the same PCI ids for the network >> device but has altered register definitions for determining the window >> settings for the indirect PCS access.Add support to check for this >> hardware and if found use the new register values > > How they are differentiated, subdevice ids? > If so should we add subdevice fields check into DPDK? > >> >> Signed-off-by: Selwin Sebastian >> --- >> drivers/net/axgbe/axgbe_common.h | 2 ++ >> drivers/net/axgbe/axgbe_ethdev.c | 18 +++++++++++++++--- >> 2 files changed, 17 insertions(+), 3 deletions(-) >> >> diff --git a/drivers/net/axgbe/axgbe_common.h >> b/drivers/net/axgbe/axgbe_common.h >> index 34f60f156..4a3fbac16 100644 >> --- a/drivers/net/axgbe/axgbe_common.h >> +++ b/drivers/net/axgbe/axgbe_common.h >> @@ -841,6 +841,8 @@ >> #define PCS_V1_WINDOW_SELECT 0x03fc >> #define PCS_V2_WINDOW_DEF 0x9060 >> #define PCS_V2_WINDOW_SELECT 0x9064 >> +#define PCS_V2_RV_WINDOW_DEF 0x1060 >> +#define PCS_V2_RV_WINDOW_SELECT 0x1064 >> >> /* PCS register entry bit positions and sizes */ >> #define PCS_V2_WINDOW_DEF_OFFSET_INDEX 6 >> diff --git a/drivers/net/axgbe/axgbe_ethdev.c >> b/drivers/net/axgbe/axgbe_ethdev.c >> index d1f160e79..25e182b8d 100644 >> --- a/drivers/net/axgbe/axgbe_ethdev.c >> +++ b/drivers/net/axgbe/axgbe_ethdev.c >> @@ -31,6 +31,7 @@ static int axgbe_dev_info_get(struct rte_eth_dev *dev, >> #define AMD_PCI_VENDOR_ID 0x1022 >> #define AMD_PCI_AXGBE_DEVICE_V2A 0x1458 #define >> AMD_PCI_AXGBE_DEVICE_V2B 0x1459 >> +extern struct rte_pci_bus rte_pci_bus; > > Not sure about accessing the bus device list from a PMD... > >> >> int axgbe_logtype_init; >> int axgbe_logtype_driver; >> @@ -585,6 +586,7 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev) >> struct rte_pci_device *pci_dev; >> uint32_t reg, mac_lo, mac_hi; >> int ret; >> + struct rte_pci_device *pdev; >> >> eth_dev->dev_ops = &axgbe_eth_dev_ops; >> eth_dev->rx_pkt_burst = &axgbe_recv_pkts; @@ -605,6 +607,17 @@ >> eth_axgbe_dev_init(struct rte_eth_dev *eth_dev) >> pci_dev = RTE_DEV_TO_PCI(eth_dev->device); >> pdata->pci_dev = pci_dev; >> >> + pdev = TAILQ_FIRST(&rte_pci_bus.device_list); > > Can you please describe what this does? You are reading first pci device and do you assume it is an axgbe device? And do you also assume there is single axgbe device? > > Why you are not simply using 'pci_dev' above? > >> + >> + if (pdev->id.vendor_id == AMD_PCI_VENDOR_ID && >> + pdev->id.device_id == 0x15d0) { > > As far as I can see, '0x15d0' is not in the supported pci_id list, so why you are checking it here? That devices shouldn't be probed at all ... > >> + pdata->xpcs_window_def_reg = PCS_V2_RV_WINDOW_DEF; >> + pdata->xpcs_window_sel_reg = PCS_V2_RV_WINDOW_SELECT; >> + } else { >> + pdata->xpcs_window_def_reg = PCS_V2_WINDOW_DEF; >> + pdata->xpcs_window_sel_reg = PCS_V2_WINDOW_SELECT; >> + } >> + >> pdata->xgmac_regs = >> (void *)pci_dev->mem_resource[AXGBE_AXGMAC_BAR].addr; >> pdata->xprop_regs = (void *)((uint8_t *)pdata->xgmac_regs @@ >> -620,14 +633,13 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev) >> pdata->vdata = &axgbe_v2b; >> >> /* Configure the PCS indirect addressing support */ >> - reg = XPCS32_IOREAD(pdata, PCS_V2_WINDOW_DEF); >> + reg = XPCS32_IOREAD(pdata, pdata->xpcs_window_def_reg); >> pdata->xpcs_window = XPCS_GET_BITS(reg, PCS_V2_WINDOW_DEF, OFFSET); >> pdata->xpcs_window <<= 6; >> pdata->xpcs_window_size = XPCS_GET_BITS(reg, PCS_V2_WINDOW_DEF, SIZE); >> pdata->xpcs_window_size = 1 << (pdata->xpcs_window_size + 7); >> pdata->xpcs_window_mask = pdata->xpcs_window_size - 1; >> - pdata->xpcs_window_def_reg = PCS_V2_WINDOW_DEF; >> - pdata->xpcs_window_sel_reg = PCS_V2_WINDOW_SELECT; >> + >> PMD_INIT_LOG(DEBUG, >> "xpcs window :%x, size :%x, mask :%x ", pdata->xpcs_window, >> pdata->xpcs_window_size, pdata->xpcs_window_mask); >>