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From: Anatoly Burakov <anatoly.burakov@intel.com>
To: dev@dpdk.org
Cc: Karol Kolacinski <karol.kolacinski@intel.com>, ian.stokes@intel.com,
bruce.richardson@intel.com
Subject: [PATCH v4 001/103] net/ice/base: add LL Tx timestamp interrupt read
Date: Wed, 26 Jun 2024 12:40:49 +0100
Message-ID: <e658954b4c2215b4b38de3f7017b6295718102fc.1719401847.git.anatoly.burakov@intel.com>
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From: Karol Kolacinski <karol.kolacinski@intel.com>
E810 products can support low latency Tx timestamp register read using the SW
interrupt from the FW. Add a check for the device capability and use the new
method if supported.
Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
Signed-off-by: Ian Stokes <ian.stokes@intel.com>
---
drivers/net/ice/base/ice_common.c | 3 +++
drivers/net/ice/base/ice_ptp_hw.h | 1 +
drivers/net/ice/base/ice_type.h | 2 ++
3 files changed, 6 insertions(+)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index ef6696cddf..b68afdaa14 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -2781,6 +2781,7 @@ ice_parse_1588_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,
info->tmr1_ena = ((number & ICE_TS_TMR1_ENA_M) != 0);
info->ts_ll_read = ((number & ICE_TS_LL_TX_TS_READ_M) != 0);
+ info->ts_ll_int_read = ((number & ICE_TS_LL_TX_TS_INT_READ_M) != 0);
info->tmr_own_map = phys_id;
@@ -2800,6 +2801,8 @@ ice_parse_1588_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,
info->tmr1_ena);
ice_debug(hw, ICE_DBG_INIT, "dev caps: ts_ll_read = %u\n",
info->ts_ll_read);
+ ice_debug(hw, ICE_DBG_INIT, "dev caps: ts_ll_int_read = %u\n",
+ info->ts_ll_int_read);
ice_debug(hw, ICE_DBG_INIT, "dev caps: tmr_own_map = %u\n",
info->tmr_own_map);
}
diff --git a/drivers/net/ice/base/ice_ptp_hw.h b/drivers/net/ice/base/ice_ptp_hw.h
index 35ab9bb3e8..441ad0b77d 100644
--- a/drivers/net/ice/base/ice_ptp_hw.h
+++ b/drivers/net/ice/base/ice_ptp_hw.h
@@ -489,6 +489,7 @@ int ice_ptp_init_phy_cfg(struct ice_hw *hw);
/* Tx timestamp low latency read definitions */
#define TS_LL_READ_RETRIES 200
+#define TS_LL_READ_TS_INTR BIT(30)
#define TS_LL_READ_TS BIT(31)
#define TS_LL_READ_TS_IDX_S 24
#define TS_LL_READ_TS_IDX_M MAKEMASK(0x3F, 0)
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 239b1a018e..7a1471e474 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -778,6 +778,7 @@ struct ice_ts_func_info {
#define ICE_TS_TMR0_ENA_M BIT(25)
#define ICE_TS_TMR1_ENA_M BIT(26)
#define ICE_TS_LL_TX_TS_READ_M BIT(28)
+#define ICE_TS_LL_TX_TS_INT_READ_M BIT(29)
struct ice_ts_dev_info {
/* Device specific info */
@@ -790,6 +791,7 @@ struct ice_ts_dev_info {
u8 tmr0_ena : 1;
u8 tmr1_ena : 1;
u8 ts_ll_read : 1;
+ u8 ts_ll_int_read : 1;
};
#define ICE_NAC_TOPO_PRIMARY_M BIT(0)
--
2.43.0