From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4C32BA052A; Wed, 27 Jan 2021 17:45:11 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id E2ABA140F68; Wed, 27 Jan 2021 17:45:10 +0100 (CET) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by mails.dpdk.org (Postfix) with ESMTP id 799ED140F5C for ; Wed, 27 Jan 2021 17:45:09 +0100 (CET) IronPort-SDR: iNAMrGfncr1W/JJwO1Qnhwb29h8R371mywHuwCVBISDVX15wB9B0WYbLpmgm2l9CVrXZ5m6Y5w RwkG6G1xD0kQ== X-IronPort-AV: E=McAfee;i="6000,8403,9877"; a="159269395" X-IronPort-AV: E=Sophos;i="5.79,380,1602572400"; d="scan'208";a="159269395" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Jan 2021 08:45:07 -0800 IronPort-SDR: ZEfYtxhKy13BWEPCsQxzmi76RezMkf0Y+055R8gGMOuDeLwhquVyBhVG2Xo/eFinRPxDfdeWSw PW/CgLug9dKA== X-IronPort-AV: E=Sophos;i="5.79,380,1602572400"; d="scan'208";a="430160896" Received: from fyigit-mobl1.ger.corp.intel.com (HELO [10.213.208.215]) ([10.213.208.215]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Jan 2021 08:45:05 -0800 To: =?UTF-8?B?6LCi5Y2O5LyfKOatpOaXtuatpOWIu++8iQ==?= Cc: dev@dpdk.org, maxime.coquelin@redhat.com, anatoly.burakov@intel.com, david.marchand@redhat.com, zhihong.wang@intel.com, chenbo.xia@intel.com, grive@u256.net References: <68ecd941-9c56-4de7-fae2-2ad15bdfd81a@alibaba-inc.com> <1603381885-88819-1-git-send-email-huawei.xhw@alibaba-inc.com> <1603381885-88819-3-git-send-email-huawei.xhw@alibaba-inc.com> <820d8f58-0a88-e9bc-e86e-6876f7f5f50f@intel.com> <1626e90c-137c-2adf-5652-d766342b077c@alibaba-inc.com> From: Ferruh Yigit Message-ID: Date: Wed, 27 Jan 2021 16:45:02 +0000 MIME-Version: 1.0 In-Reply-To: <1626e90c-137c-2adf-5652-d766342b077c@alibaba-inc.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit Subject: Re: [dpdk-dev] [PATCH v5 2/3] PCI: support MMIO in rte_pci_ioport_map/unap/read/write X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On 1/27/2021 3:34 PM, 谢华伟(此时此刻） wrote: > > On 2021/1/27 18:40, Ferruh Yigit wrote: >> On 10/22/2020 4:51 PM, 谢华伟(此时此刻） wrote: >>> From: "huawei.xhw" >>> >>> If IO BAR, we get PIO address. >>> If MMIO BAR, we get mapped virtual address. >>> We distinguish PIO and MMIO by their address like how kernel does. >>> ioread/write8/16/32 is provided to access PIO/MMIO. >>> BTW, for virtio on arch other than x86, BAR flag indicates PIO but is mapped. >>> >>> Signed-off-by: huawei.xhw >> >> <...> >> >>> @@ -408,15 +403,30 @@ >>>           &end_addr, &flags) < 0) >>>           goto error; >>>   -    if (!(flags & IORESOURCE_IO)) { >>> -        RTE_LOG(ERR, EAL, "%s(): bar resource other than IO is not >>> supported\n", __func__); >>> +    if (flags & IORESOURCE_IO) { >>> +        iobar = 1; >>> +        base = (unsigned long)phys_addr; >>> +        RTE_LOG(INFO, EAL, "%s(): PIO BAR %08lx detected\n", __func__, base); >>> +    } else if (flags & IORESOURCE_MEM) { >>> +        iobar = 0; >>> +        base = (unsigned long)dev->mem_resource[bar].addr; >> >> Hi Huawei, >> >> At this stage, to have a valid 'addr' it should be already mmap'ed, can you >> please provide the call stack when it is set/mmaped, to confirm it will be >> always valid at this point? >> >> Thanks, >> ferruh > > #0  pci_uio_map_resource_by_index (dev=0x420c700, res_idx=0, > uio_res=0x1003b19c0, map_idx=0) at ../drivers/bus/pci/linux/pci_uio.c:286 > #1  0x000000000095f047 in pci_uio_map_resource (dev=0x420c700) at > ../drivers/bus/pci/pci_common_uio.c:112 > #2  0x000000000095f645 in rte_pci_map_device (dev=0x420c700) at > ../drivers/bus/pci/linux/pci.c:81 > #3  0x000000000174b5b9 in virtio_read_caps (dev=0x420c700, hw=0x1003b2d80) at > ../drivers/net/virtio/virtio_pci.c:574 > #4  0x000000000174baf9 in vtpci_init (dev=0x420c700, hw=0x1003b2d80) at > ../drivers/net/virtio/virtio_pci.c:697 > #5  0x0000000001743c84 in eth_virtio_dev_init (eth_dev=0x3461e40 > ) at ../drivers/net/virtio/virtio_ethdev.c:1954 > > Thanks. This looks good.