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d="scan'208";a="572538045" Received: from fmsmsx604.amr.corp.intel.com ([10.18.126.84]) by fmsmga005.fm.intel.com with ESMTP; 14 Jan 2021 22:43:44 -0800 Received: from shsmsx603.ccr.corp.intel.com (10.109.6.143) by fmsmsx604.amr.corp.intel.com (10.18.126.84) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Thu, 14 Jan 2021 22:43:40 -0800 Received: from shsmsx606.ccr.corp.intel.com (10.109.6.216) by SHSMSX603.ccr.corp.intel.com (10.109.6.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Fri, 15 Jan 2021 14:43:39 +0800 Received: from shsmsx606.ccr.corp.intel.com ([10.109.6.216]) by SHSMSX606.ccr.corp.intel.com ([10.109.6.216]) with mapi id 15.01.1713.004; Fri, 15 Jan 2021 14:43:38 +0800 From: "Xie, WeiX" To: "Zhang, AlvinX" , "Guo, Jia" , "Wang, Haiyue" CC: "dev@dpdk.org" , "Zhang, AlvinX" , "stable@dpdk.org" Thread-Topic: [PATCH v2] net/ixgbe: fix configuration of max frame size Thread-Index: AQHW6uaLnsToiiw7k0CIKnsu+wc5K6ooPY7Q Date: Fri, 15 Jan 2021 06:43:38 +0000 Message-ID: References: <20210114101427.12344-1-alvinx.zhang@intel.com> <20210115023126.26248-1-alvinx.zhang@intel.com> In-Reply-To: <20210115023126.26248-1-alvinx.zhang@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.36] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v2] net/ixgbe: fix configuration of max frame size X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Tested-by: Xie,WeiX < weix.xie@intel.com> Regards, Xie Wei > -----Original Message----- > From: Zhang,Alvin [mailto:alvinx.zhang@intel.com] > Sent: Friday, January 15, 2021 10:31 AM > To: Guo, Jia ; Wang, Haiyue ; > Xie, WeiX > Cc: dev@dpdk.org; Zhang, AlvinX ; > stable@dpdk.org > Subject: [PATCH v2] net/ixgbe: fix configuration of max frame size >=20 > From: Alvin Zhang >=20 > For 82599 NIC, jumbo frame feature is not supported in IOV mode, but if a= VF > requests to configure the frame size to that not bigger than > RTE_ETHER_MAX_LEN, the PMD should not return -1. > This patch keeps ixgbe PMD's handling mode consistent with kernel driver = in > above situation. >=20 > In addition, the value set by the command IXGBE_VF_SET_LPE represents > the max frame size, not the mtu. >=20 > Fixes: 1b9ea09c067b ("ixgbe: support X550") > Fixes: 95a27b3ba5f5 ("net/ixgbe: enable jumbo frame for VF") > Cc: stable@dpdk.org >=20 > Signed-off-by: Alvin Zhang > --- > drivers/net/ixgbe/ixgbe_pf.c | 25 ++++++++++++++----------- > 1 file changed, 14 insertions(+), 11 deletions(-) >=20 > diff --git a/drivers/net/ixgbe/ixgbe_pf.c b/drivers/net/ixgbe/ixgbe_pf.c > index 833863a..4cedaa5 100644 > --- a/drivers/net/ixgbe/ixgbe_pf.c > +++ b/drivers/net/ixgbe/ixgbe_pf.c > @@ -555,27 +555,30 @@ int ixgbe_pf_host_configure(struct rte_eth_dev > *eth_dev) ixgbe_set_vf_lpe(struct rte_eth_dev *dev, __rte_unused > uint32_t vf, uint32_t *msgbuf) { > struct ixgbe_hw *hw =3D IXGBE_DEV_PRIVATE_TO_HW(dev->data- > >dev_private); > - uint32_t new_mtu =3D msgbuf[1]; > - uint32_t max_frs; > + uint32_t max_frame =3D msgbuf[1]; > + uint32_t cur_frame_size; > uint32_t hlreg0; > - int max_frame =3D new_mtu + RTE_ETHER_HDR_LEN + > RTE_ETHER_CRC_LEN; >=20 > /* X540 and X550 support jumbo frames in IOV mode */ > if (hw->mac.type !=3D ixgbe_mac_X540 && > hw->mac.type !=3D ixgbe_mac_X550 && > hw->mac.type !=3D ixgbe_mac_X550EM_x && > - hw->mac.type !=3D ixgbe_mac_X550EM_a) > - return -1; > + hw->mac.type !=3D ixgbe_mac_X550EM_a) { > + if (max_frame > dev->data- > >dev_conf.rxmode.max_rx_pkt_len) > + return -1; > + > + return 0; > + } >=20 > if (max_frame < RTE_ETHER_MIN_LEN || > max_frame > > RTE_ETHER_MAX_JUMBO_FRAME_LEN) > return -1; >=20 > - max_frs =3D (IXGBE_READ_REG(hw, IXGBE_MAXFRS) & > - IXGBE_MHADD_MFS_MASK) >> > IXGBE_MHADD_MFS_SHIFT; > - if (max_frs < new_mtu) { > + cur_frame_size =3D (IXGBE_READ_REG(hw, IXGBE_MAXFRS) & > + IXGBE_MHADD_MFS_MASK) >> > IXGBE_MHADD_MFS_SHIFT; > + if (cur_frame_size < max_frame) { > hlreg0 =3D IXGBE_READ_REG(hw, IXGBE_HLREG0); > - if (new_mtu > RTE_ETHER_MAX_LEN) { > + if (max_frame > RTE_ETHER_MAX_LEN) { > dev->data->dev_conf.rxmode.offloads |=3D > DEV_RX_OFFLOAD_JUMBO_FRAME; > hlreg0 |=3D IXGBE_HLREG0_JUMBOEN; > @@ -586,8 +589,8 @@ int ixgbe_pf_host_configure(struct rte_eth_dev > *eth_dev) > } > IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0); >=20 > - max_frs =3D new_mtu << IXGBE_MHADD_MFS_SHIFT; > - IXGBE_WRITE_REG(hw, IXGBE_MAXFRS, max_frs); > + IXGBE_WRITE_REG(hw, IXGBE_MAXFRS, > + max_frame << IXGBE_MHADD_MFS_SHIFT); > } >=20 > return 0; > -- > 1.8.3.1