From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id DB29BA0C43; Tue, 19 Oct 2021 13:27:54 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id E43574116A; Tue, 19 Oct 2021 13:27:49 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id C33FA4116A for ; Tue, 19 Oct 2021 13:27:47 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 19JA0FfX009227 for ; Tue, 19 Oct 2021 04:27:46 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=TT2kqXiaHEwyPRpd1rQgECZn1AAz4V2gm+QozLyXT8w=; b=BtUOXl9NdNCBkJeTwcnauTzs63hXg5kCUx7mRABhhrUedq5r0dfdKL3xcacGXfwJZLM/ UU3KNe7B2gVQmjm8/EOJLw5VrUfwN0ZObf1nLdSrAW/KSANoTkwfYIUk//n4T5zodPG9 qWUovjqH5C7AHLbn9HUJxmxrObwPb9nEQq4uBn3zhFxLt69nOJjiel+HmLZwf7DF0oiv 3JbacaKjz0Uw3Psr0vvm7zSwP2dRskjd9+tAgIj9xGkaTMOWSVQRwRgx/nOLs3UMfXdW t2++LtrftNiru0YLzO+P59H/v+PfK8b8mMs5DN9uVw4adFnP9e5PuexnnMMp/nCZOQ/M Zw== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com with ESMTP id 3bsnmq27ax-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Tue, 19 Oct 2021 04:27:46 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Tue, 19 Oct 2021 04:27:45 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Tue, 19 Oct 2021 04:27:45 -0700 Received: from localhost.localdomain (unknown [10.28.34.38]) by maili.marvell.com (Postfix) with ESMTP id 5B22B3F7081; Tue, 19 Oct 2021 04:27:42 -0700 (PDT) From: Gowrishankar Muthukrishnan To: CC: , , , , , , , , Gowrishankar Muthukrishnan Date: Tue, 19 Oct 2021 16:57:24 +0530 Message-ID: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: 29CC86OhKN6Bx75pykp0xCsivGGCOOEI X-Proofpoint-ORIG-GUID: 29CC86OhKN6Bx75pykp0xCsivGGCOOEI X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.0.607.475 definitions=2021-10-19_01,2021-10-19_01,2020-04-07_01 Subject: [dpdk-dev] [v10 1/4] common/cnxk: add telemetry endpoints to npa X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add telemetry endpoints to npa. Signed-off-by: Gowrishankar Muthukrishnan --- drivers/common/cnxk/cnxk_telemetry.h | 26 +++ drivers/common/cnxk/cnxk_telemetry_npa.c | 260 +++++++++++++++++++++++ drivers/common/cnxk/meson.build | 5 + drivers/common/cnxk/roc_platform.h | 15 ++ 4 files changed, 306 insertions(+) create mode 100644 drivers/common/cnxk/cnxk_telemetry.h create mode 100644 drivers/common/cnxk/cnxk_telemetry_npa.c diff --git a/drivers/common/cnxk/cnxk_telemetry.h b/drivers/common/cnxk/cnxk_telemetry.h new file mode 100644 index 0000000000..1461fd893f --- /dev/null +++ b/drivers/common/cnxk/cnxk_telemetry.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2021 Marvell. + */ + +#ifndef __CNXK_TELEMETRY_H_ +#define __CNXK_TELEMETRY_H_ + +#define CNXK_TEL_STR(s) #s +#define CNXK_TEL_STR_PREFIX(s, p) CNXK_TEL_STR(p##s) +#define CNXK_TEL_DICT_INT(d, p, s, ...) \ + plt_tel_data_add_dict_int(d, CNXK_TEL_STR_PREFIX(s, __VA_ARGS__), \ + (p)->s) +#define CNXK_TEL_DICT_PTR(d, p, s, ...) \ + plt_tel_data_add_dict_ptr(d, CNXK_TEL_STR_PREFIX(s, __VA_ARGS__), \ + (void *)(p)->s) +#define CNXK_TEL_DICT_BF_PTR(d, p, s, ...) \ + plt_tel_data_add_dict_ptr(d, CNXK_TEL_STR_PREFIX(s, __VA_ARGS__), \ + (void *)(uint64_t)(p)->s) +#define CNXK_TEL_DICT_U64(d, p, s, ...) \ + plt_tel_data_add_dict_u64(d, CNXK_TEL_STR_PREFIX(s, __VA_ARGS__), \ + (p)->s) +#define CNXK_TEL_DICT_STR(d, p, s, ...) \ + plt_tel_data_add_dict_string(d, CNXK_TEL_STR_PREFIX(s, __VA_ARGS__), \ + (p)->s) + +#endif /* __CNXK_TELEMETRY_H_ */ diff --git a/drivers/common/cnxk/cnxk_telemetry_npa.c b/drivers/common/cnxk/cnxk_telemetry_npa.c new file mode 100644 index 0000000000..ae515df84f --- /dev/null +++ b/drivers/common/cnxk/cnxk_telemetry_npa.c @@ -0,0 +1,260 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2021 Marvell. + */ + +#include "cnxk_telemetry.h" +#include "roc_api.h" +#include "roc_priv.h" + +static int +cnxk_tel_npa(struct plt_tel_data *d) +{ + struct npa_lf *lf; + int aura_cnt = 0; + uint32_t i; + + lf = idev_npa_obj_get(); + if (lf == NULL) + return NPA_ERR_DEVICE_NOT_BOUNDED; + + for (i = 0; i < lf->nr_pools; i++) { + if (plt_bitmap_get(lf->npa_bmp, i)) + continue; + aura_cnt++; + } + + plt_tel_data_add_dict_ptr(d, "npa", lf); + plt_tel_data_add_dict_int(d, "pf", dev_get_pf(lf->pf_func)); + plt_tel_data_add_dict_int(d, "vf", dev_get_vf(lf->pf_func)); + plt_tel_data_add_dict_int(d, "aura_cnt", aura_cnt); + + CNXK_TEL_DICT_STR(d, lf->pci_dev, name, pcidev_); + CNXK_TEL_DICT_PTR(d, lf, npa_bmp); + CNXK_TEL_DICT_PTR(d, lf, npa_bmp_mem); + CNXK_TEL_DICT_PTR(d, lf, npa_qint_mem); + CNXK_TEL_DICT_PTR(d, lf, mbox); + CNXK_TEL_DICT_PTR(d, lf, base); + CNXK_TEL_DICT_INT(d, lf, stack_pg_ptrs); + CNXK_TEL_DICT_INT(d, lf, stack_pg_bytes); + CNXK_TEL_DICT_INT(d, lf, npa_msixoff); + CNXK_TEL_DICT_INT(d, lf, nr_pools); + CNXK_TEL_DICT_INT(d, lf, pf_func); + CNXK_TEL_DICT_INT(d, lf, aura_sz); + CNXK_TEL_DICT_INT(d, lf, qints); + + return 0; +} + +static int +cnxk_tel_npa_aura(int aura_id, struct plt_tel_data *d) +{ + __io struct npa_aura_s *aura; + struct npa_aq_enq_req *req; + struct npa_aq_enq_rsp *rsp; + struct npa_lf *lf; + int rc; + + lf = idev_npa_obj_get(); + if (lf == NULL) + return NPA_ERR_DEVICE_NOT_BOUNDED; + + if (plt_bitmap_get(lf->npa_bmp, aura_id)) + return -1; + + req = mbox_alloc_msg_npa_aq_enq(lf->mbox); + if (!req) { + plt_err("Failed to alloc aq enq for npa"); + return -1; + } + + req->aura_id = aura_id; + req->ctype = NPA_AQ_CTYPE_AURA; + req->op = NPA_AQ_INSTOP_READ; + + rc = mbox_process_msg(lf->mbox, (void *)&rsp); + if (rc) { + plt_err("Failed to get pool(%d) context", aura_id); + return rc; + } + + aura = &rsp->aura; + CNXK_TEL_DICT_PTR(d, aura, pool_addr, w0_); + CNXK_TEL_DICT_INT(d, aura, ena, w1_); + CNXK_TEL_DICT_INT(d, aura, pool_caching, w1_); + CNXK_TEL_DICT_INT(d, aura, pool_way_mask, w1_); + CNXK_TEL_DICT_INT(d, aura, avg_con, w1_); + CNXK_TEL_DICT_INT(d, aura, pool_drop_ena, w1_); + CNXK_TEL_DICT_INT(d, aura, aura_drop_ena, w1_); + CNXK_TEL_DICT_INT(d, aura, bp_ena, w1_); + CNXK_TEL_DICT_INT(d, aura, aura_drop, w1_); + CNXK_TEL_DICT_INT(d, aura, avg_level, w1_); + CNXK_TEL_DICT_U64(d, aura, count, w2_); + CNXK_TEL_DICT_INT(d, aura, nix0_bpid, w2_); + CNXK_TEL_DICT_INT(d, aura, nix1_bpid, w2_); + CNXK_TEL_DICT_U64(d, aura, limit, w3_); + CNXK_TEL_DICT_INT(d, aura, bp, w3_); + CNXK_TEL_DICT_INT(d, aura, fc_ena, w3_); + CNXK_TEL_DICT_INT(d, aura, fc_up_crossing, w3_); + CNXK_TEL_DICT_INT(d, aura, fc_stype, w3_); + CNXK_TEL_DICT_INT(d, aura, fc_hyst_bits, w3_); + CNXK_TEL_DICT_INT(d, aura, fc_addr, w4_); + CNXK_TEL_DICT_INT(d, aura, pool_drop, w5_); + CNXK_TEL_DICT_INT(d, aura, update_time, w5_); + CNXK_TEL_DICT_INT(d, aura, err_int, w5_); + CNXK_TEL_DICT_INT(d, aura, err_int_ena, w5_); + CNXK_TEL_DICT_INT(d, aura, thresh_int, w5_); + CNXK_TEL_DICT_INT(d, aura, thresh_int_ena, w5_); + CNXK_TEL_DICT_INT(d, aura, thresh_up, w5_); + CNXK_TEL_DICT_INT(d, aura, thresh_qint_idx, w5_); + CNXK_TEL_DICT_INT(d, aura, err_qint_idx, w5_); + CNXK_TEL_DICT_U64(d, aura, thresh, w6_); + + return 0; +} + +static int +cnxk_tel_npa_pool(int pool_id, struct plt_tel_data *d) +{ + __io struct npa_pool_s *pool; + struct npa_aq_enq_req *req; + struct npa_aq_enq_rsp *rsp; + struct npa_lf *lf; + int rc; + + lf = idev_npa_obj_get(); + if (lf == NULL) + return NPA_ERR_DEVICE_NOT_BOUNDED; + + if (plt_bitmap_get(lf->npa_bmp, pool_id)) + return -1; + + req = mbox_alloc_msg_npa_aq_enq(lf->mbox); + if (!req) { + plt_err("Failed to alloc aq enq for npa"); + return -1; + } + + req->aura_id = pool_id; + req->ctype = NPA_AQ_CTYPE_POOL; + req->op = NPA_AQ_INSTOP_READ; + + rc = mbox_process_msg(lf->mbox, (void *)&rsp); + if (rc) { + plt_err("Failed to get pool(%d) context", pool_id); + return rc; + } + + pool = &rsp->pool; + CNXK_TEL_DICT_PTR(d, pool, stack_base, w0_); + CNXK_TEL_DICT_INT(d, pool, ena, w1_); + CNXK_TEL_DICT_INT(d, pool, nat_align, w1_); + CNXK_TEL_DICT_INT(d, pool, stack_caching, w1_); + CNXK_TEL_DICT_INT(d, pool, stack_way_mask, w1_); + CNXK_TEL_DICT_INT(d, pool, buf_offset, w1_); + CNXK_TEL_DICT_INT(d, pool, buf_size, w1_); + CNXK_TEL_DICT_INT(d, pool, stack_max_pages, w2_); + CNXK_TEL_DICT_INT(d, pool, stack_pages, w2_); + CNXK_TEL_DICT_INT(d, pool, op_pc, w3_); + CNXK_TEL_DICT_INT(d, pool, stack_offset, w4_); + CNXK_TEL_DICT_INT(d, pool, shift, w4_); + CNXK_TEL_DICT_INT(d, pool, avg_level, w4_); + CNXK_TEL_DICT_INT(d, pool, avg_con, w4_); + CNXK_TEL_DICT_INT(d, pool, fc_ena, w4_); + CNXK_TEL_DICT_INT(d, pool, fc_stype, w4_); + CNXK_TEL_DICT_INT(d, pool, fc_hyst_bits, w4_); + CNXK_TEL_DICT_INT(d, pool, fc_up_crossing, w4_); + CNXK_TEL_DICT_INT(d, pool, update_time, w4_); + CNXK_TEL_DICT_PTR(d, pool, fc_addr, w5_); + CNXK_TEL_DICT_PTR(d, pool, ptr_start, w6_); + CNXK_TEL_DICT_PTR(d, pool, ptr_end, w7_); + CNXK_TEL_DICT_INT(d, pool, err_int, w8_); + CNXK_TEL_DICT_INT(d, pool, err_int_ena, w8_); + CNXK_TEL_DICT_INT(d, pool, thresh_int, w8_); + CNXK_TEL_DICT_INT(d, pool, thresh_int_ena, w8_); + CNXK_TEL_DICT_INT(d, pool, thresh_up, w8_); + CNXK_TEL_DICT_INT(d, pool, thresh_qint_idx, w8_); + CNXK_TEL_DICT_INT(d, pool, err_qint_idx, w8_); + + return 0; +} + +static int +cnxk_npa_tel_handle_info(const char *cmd __plt_unused, + const char *params __plt_unused, + struct plt_tel_data *d) +{ + plt_tel_data_start_dict(d); + return cnxk_tel_npa(d); +} + +static int +cnxk_npa_tel_handle_aura_list(const char *cmd __plt_unused, + const char *params __plt_unused, + struct plt_tel_data *d) +{ + struct npa_lf *lf; + int i; + + lf = idev_npa_obj_get(); + if (lf == NULL) + return NPA_ERR_DEVICE_NOT_BOUNDED; + + plt_tel_data_start_array(d, PLT_TEL_INT_VAL); + + for (i = 0; i < (int)lf->nr_pools; i++) + if (!plt_bitmap_get(lf->npa_bmp, i)) + rte_tel_data_add_array_int(d, i); + + return 0; +} + +static int +cnxk_npa_tel_handle_pool_list(const char *cmd, const char *params, + struct plt_tel_data *d) +{ + /* In current implementation, aura and pool ID mapped 1:1 */ + return cnxk_npa_tel_handle_aura_list(cmd, params, d); +} + +static int +cnxk_npa_tel_handle_info_x(const char *cmd, const char *params, + struct plt_tel_data *d) +{ + int id, rc; + + if (params == NULL || strlen(params) == 0 || !isdigit(*params)) + return -1; + + id = strtol(params, NULL, 10); + plt_tel_data_start_dict(d); + + if (strstr(cmd, "aura/info")) + rc = cnxk_tel_npa_aura(id, d); + else + rc = cnxk_tel_npa_pool(id, d); + + return rc; +} + +PLT_INIT(cnxk_telemetry_npa_init) +{ + plt_telemetry_register_cmd( + "/cnxk/npa/info", cnxk_npa_tel_handle_info, + "Returns npa information. Takes no parameters"); + + plt_telemetry_register_cmd( + "/cnxk/npa/aura/list", cnxk_npa_tel_handle_aura_list, + "Returns list of npa aura id. Takes no parameters"); + + plt_telemetry_register_cmd( + "/cnxk/npa/aura/info", cnxk_npa_tel_handle_info_x, + "Returns npa aura information. Parameters: aura_id"); + + plt_telemetry_register_cmd( + "/cnxk/npa/pool/list", cnxk_npa_tel_handle_pool_list, + "Returns list of npa pool id. Takes no parameters"); + + plt_telemetry_register_cmd( + "/cnxk/npa/pool/info", cnxk_npa_tel_handle_info_x, + "Returns npa pool information. Parameters: pool_id"); +} diff --git a/drivers/common/cnxk/meson.build b/drivers/common/cnxk/meson.build index 97db5f087b..d88cfbc7fa 100644 --- a/drivers/common/cnxk/meson.build +++ b/drivers/common/cnxk/meson.build @@ -71,3 +71,8 @@ includes += include_directories('../../bus/pci') includes += include_directories('../../../lib/net') includes += include_directories('../../../lib/ethdev') includes += include_directories('../../../lib/meter') + +# Telemetry common code +sources += files('cnxk_telemetry_npa.c') + +deps += ['bus_pci', 'net', 'telemetry'] diff --git a/drivers/common/cnxk/roc_platform.h b/drivers/common/cnxk/roc_platform.h index 241655b334..59af6f4975 100644 --- a/drivers/common/cnxk/roc_platform.h +++ b/drivers/common/cnxk/roc_platform.h @@ -19,6 +19,7 @@ #include #include #include +#include #include "roc_bits.h" @@ -51,6 +52,7 @@ #define PLT_CACHE_LINE_SIZE RTE_CACHE_LINE_SIZE #define BITMASK_ULL GENMASK_ULL #define PLT_ALIGN_CEIL RTE_ALIGN_CEIL +#define PLT_INIT RTE_INIT /** Divide ceil */ #define PLT_DIV_CEIL(x, y) \ @@ -63,6 +65,7 @@ #define __plt_cache_aligned __rte_cache_aligned #define __plt_always_inline __rte_always_inline #define __plt_packed __rte_packed +#define __plt_unused __rte_unused #define __roc_api __rte_internal #define plt_iova_t rte_iova_t @@ -142,6 +145,18 @@ #define plt_strlcpy rte_strlcpy +#define PLT_TEL_INT_VAL RTE_TEL_INT_VAL +#define plt_tel_data rte_tel_data +#define plt_tel_data_start_array rte_tel_data_start_array +#define plt_tel_data_add_array_int rte_tel_data_add_array_int +#define plt_tel_data_start_dict rte_tel_data_start_dict +#define plt_tel_data_add_dict_int rte_tel_data_add_dict_int +#define plt_tel_data_add_dict_ptr(d, n, v) \ + rte_tel_data_add_dict_u64(d, n, (uint64_t)v) +#define plt_tel_data_add_dict_string rte_tel_data_add_dict_string +#define plt_tel_data_add_dict_u64 rte_tel_data_add_dict_u64 +#define plt_telemetry_register_cmd rte_telemetry_register_cmd + /* Log */ extern int cnxk_logtype_base; extern int cnxk_logtype_mbox; -- 2.25.1