From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 84CF9A04B1; Mon, 5 Oct 2020 21:35:41 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 539074C93; Mon, 5 Oct 2020 21:35:40 +0200 (CEST) Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) by dpdk.org (Postfix) with ESMTP id 70B292BA8 for ; Mon, 5 Oct 2020 21:35:38 +0200 (CEST) Received: from pps.filterd (m0098410.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 095JW9VF113636; Mon, 5 Oct 2020 15:35:35 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=subject : to : cc : references : from : message-id : date : mime-version : in-reply-to : content-type : content-transfer-encoding; s=pp1; bh=yB3GMMd2lW/IvsHEQBsxYuNSblB3utT3rX3u6GGB9DU=; b=PBtb2FKFAbhYPCsbpLVSLqLulJfjxT+sIQySjYoEuq9QGMxveMLtlIJeFudtBHMM6KWY SSOsJI6njaUahXj7PM//x0cPG5qE5SXnu2rNvw4vQk7JrLhigzZATOJkCf6tbkRblLr2 J+nvQsk/NEO/RlKAl1/oj5z+l4yxjf+GaQBAvurQuy3UcTFcdRm/k50anqPXKq2Kyu3F NWQKi8uzLS7gNWoG2uPv1EU6fCYarUQrM/FbcilEG1hmHwYNaP8GqY6WqmM9/9ezu5c7 JnU6obEsJHj+6Zy8BsLtjQ3NBoWugPMKVFKKwl7TnGtAVOqzLMcmAbiMz13yr/fSeGLX YQ== Received: from ppma01dal.us.ibm.com (83.d6.3fa9.ip4.static.sl-reverse.com [169.63.214.131]) by mx0a-001b2d01.pphosted.com with ESMTP id 34078c52dp-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 05 Oct 2020 15:35:35 -0400 Received: from pps.filterd (ppma01dal.us.ibm.com [127.0.0.1]) by ppma01dal.us.ibm.com (8.16.0.42/8.16.0.42) with SMTP id 095JXLCq020407; Mon, 5 Oct 2020 19:35:34 GMT Received: from b01cxnp23034.gho.pok.ibm.com (b01cxnp23034.gho.pok.ibm.com [9.57.198.29]) by ppma01dal.us.ibm.com with ESMTP id 33xgx96f01-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 05 Oct 2020 19:35:34 +0000 Received: from b01ledav004.gho.pok.ibm.com (b01ledav004.gho.pok.ibm.com [9.57.199.109]) by b01cxnp23034.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 095JZX3m54067696 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 5 Oct 2020 19:35:33 GMT Received: from b01ledav004.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 8FC9F112063; Mon, 5 Oct 2020 19:35:33 +0000 (GMT) Received: from b01ledav004.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 8E76E112061; Mon, 5 Oct 2020 19:35:32 +0000 (GMT) Received: from Davids-MBP.randomparity.org (unknown [9.211.110.122]) by b01ledav004.gho.pok.ibm.com (Postfix) with ESMTP; Mon, 5 Oct 2020 19:35:32 +0000 (GMT) To: Ciara Power , dev@dpdk.org Cc: Ruifeng Wang , Jerin Jacob , Honnappa Nagarahalli , Jan Viktorin , Bruce Richardson , Konstantin Ananyev References: <20200807155859.63888-1-ciara.power@intel.com> <20200930130415.11211-1-ciara.power@intel.com> <20200930130415.11211-3-ciara.power@intel.com> From: David Christensen Message-ID: Date: Mon, 5 Oct 2020 12:35:31 -0700 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:68.0) Gecko/20100101 Thunderbird/68.12.0 MIME-Version: 1.0 In-Reply-To: <20200930130415.11211-3-ciara.power@intel.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687 definitions=2020-10-05_14:2020-10-05, 2020-10-05 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 phishscore=0 clxscore=1015 lowpriorityscore=0 adultscore=0 bulkscore=0 priorityscore=1501 malwarescore=0 spamscore=0 impostorscore=0 mlxscore=0 mlxlogscore=759 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2006250000 definitions=main-2010050136 Subject: Re: [dpdk-dev] [PATCH v3 02/18] eal: add default SIMD bitwidth values X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On 9/30/20 6:03 AM, Ciara Power wrote: > Each arch has a define for the default SIMD bitwidth value, this is used > on EAL init to set the config max SIMD bitwidth. > > Cc: Ruifeng Wang > Cc: Jerin Jacob > Cc: Honnappa Nagarahalli > Cc: David Christensen > > Signed-off-by: Ciara Power > > --- > v3: > - Removed unnecessary define in generic rte_vect.h > - Changed default bitwidth for ARM to UINT16_MAX, to allow for SVE. > v2: Changed default bitwidth for Arm to 128. > --- > lib/librte_eal/arm/include/rte_vect.h | 2 ++ > lib/librte_eal/common/eal_common_options.c | 3 +++ > lib/librte_eal/ppc/include/rte_vect.h | 2 ++ > lib/librte_eal/x86/include/rte_vect.h | 2 ++ > 4 files changed, 9 insertions(+) > Reviewed-By: David Christensen