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From: Maxime Coquelin <maxime.coquelin@redhat.com>
To: Hernan Vargas <hernan.vargas@intel.com>,
	dev@dpdk.org, gakhil@marvell.com, trix@redhat.com
Cc: nicolas.chautru@intel.com, qi.z.zhang@intel.com, stable@dpdk.org
Subject: Re: [PATCH v5 1/5] doc: fix fpga 5gnr configuration values
Date: Tue, 6 Feb 2024 16:15:48 +0100	[thread overview]
Message-ID: <f6066703-3f0f-47f5-b799-23bb8fa1ea78@redhat.com> (raw)
In-Reply-To: <20240123165454.104465-2-hernan.vargas@intel.com>



On 1/23/24 17:54, Hernan Vargas wrote:
> flr_timeout was removed from the code a while ago, updating doc.
> Fix minor typo in 5GNR example.
> 
> Fixes: 2d4306438c92 ("baseband/fpga_5gnr_fec: add configure function")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   doc/guides/bbdevs/fpga_5gnr_fec.rst | 7 +------
>   1 file changed, 1 insertion(+), 6 deletions(-)
> 
> diff --git a/doc/guides/bbdevs/fpga_5gnr_fec.rst b/doc/guides/bbdevs/fpga_5gnr_fec.rst
> index 956dd6bed560..99fc936829a8 100644
> --- a/doc/guides/bbdevs/fpga_5gnr_fec.rst
> +++ b/doc/guides/bbdevs/fpga_5gnr_fec.rst
> @@ -100,7 +100,6 @@ parameters defined in ``rte_fpga_5gnr_fec_conf`` structure:
>         uint8_t dl_bandwidth;
>         uint8_t ul_load_balance;
>         uint8_t dl_load_balance;
> -      uint16_t flr_time_out;
>     };
>   
>   - ``pf_mode_en``: identifies whether only PF is to be used, or the VFs. PF and
> @@ -126,10 +125,6 @@ parameters defined in ``rte_fpga_5gnr_fec_conf`` structure:
>     If all hardware queues exceeds the watermark, no code blocks will be
>     streamed in from UL/DL code block FIFO.
>   
> -- ``flr_time_out``: specifies how many 16.384us to be FLR time out. The
> -  time_out = flr_time_out x 16.384us. For instance, if you want to set 10ms for
> -  the FLR time out then set this setting to 0x262=610.
> -
>   
>   An example configuration code calling the function ``rte_fpga_5gnr_fec_configure()`` is shown
>   below:
> @@ -154,7 +149,7 @@ below:
>     /* setup FPGA PF */
>     ret = rte_fpga_5gnr_fec_configure(info->dev_name, &conf);
>     TEST_ASSERT_SUCCESS(ret,
> -      "Failed to configure 4G FPGA PF for bbdev %s",
> +      "Failed to configure 5GNR FPGA PF for bbdev %s",
>         info->dev_name);
>   
>   

Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>

Thanks,
Maxime


  reply	other threads:[~2024-02-06 15:15 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-01-23 16:54 [PATCH v5 0/5] changes for 24.03 Hernan Vargas
2024-01-23 16:54 ` [PATCH v5 1/5] doc: fix fpga 5gnr configuration values Hernan Vargas
2024-02-06 15:15   ` Maxime Coquelin [this message]
2024-01-23 16:54 ` [PATCH v5 2/5] baseband/fpga_5gnr_fec: renaming for consistency Hernan Vargas
2024-01-23 16:54 ` [PATCH v5 3/5] baseband/fpga_5gnr_fec: add Vista Creek variant Hernan Vargas
2024-01-23 16:54 ` [PATCH v5 4/5] baseband/fpga_5gnr_fec: add AGX100 support Hernan Vargas
2024-02-06 15:30   ` Maxime Coquelin
2024-02-07  8:19     ` Maxime Coquelin
2024-01-23 16:54 ` [PATCH v5 5/5] baseband/fpga_5gnr_fec: cosmetic comment changes Hernan Vargas
2024-02-06 15:38   ` Maxime Coquelin

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