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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On 1/23/24 17:54, Hernan Vargas wrote: > flr_timeout was removed from the code a while ago, updating doc. > Fix minor typo in 5GNR example. > > Fixes: 2d4306438c92 ("baseband/fpga_5gnr_fec: add configure function") > Cc: stable@dpdk.org > > Signed-off-by: Hernan Vargas > --- > doc/guides/bbdevs/fpga_5gnr_fec.rst | 7 +------ > 1 file changed, 1 insertion(+), 6 deletions(-) > > diff --git a/doc/guides/bbdevs/fpga_5gnr_fec.rst b/doc/guides/bbdevs/fpga_5gnr_fec.rst > index 956dd6bed560..99fc936829a8 100644 > --- a/doc/guides/bbdevs/fpga_5gnr_fec.rst > +++ b/doc/guides/bbdevs/fpga_5gnr_fec.rst > @@ -100,7 +100,6 @@ parameters defined in ``rte_fpga_5gnr_fec_conf`` structure: > uint8_t dl_bandwidth; > uint8_t ul_load_balance; > uint8_t dl_load_balance; > - uint16_t flr_time_out; > }; > > - ``pf_mode_en``: identifies whether only PF is to be used, or the VFs. PF and > @@ -126,10 +125,6 @@ parameters defined in ``rte_fpga_5gnr_fec_conf`` structure: > If all hardware queues exceeds the watermark, no code blocks will be > streamed in from UL/DL code block FIFO. > > -- ``flr_time_out``: specifies how many 16.384us to be FLR time out. The > - time_out = flr_time_out x 16.384us. For instance, if you want to set 10ms for > - the FLR time out then set this setting to 0x262=610. > - > > An example configuration code calling the function ``rte_fpga_5gnr_fec_configure()`` is shown > below: > @@ -154,7 +149,7 @@ below: > /* setup FPGA PF */ > ret = rte_fpga_5gnr_fec_configure(info->dev_name, &conf); > TEST_ASSERT_SUCCESS(ret, > - "Failed to configure 4G FPGA PF for bbdev %s", > + "Failed to configure 5GNR FPGA PF for bbdev %s", > info->dev_name); > > Reviewed-by: Maxime Coquelin Thanks, Maxime