From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3482C454EF; Tue, 25 Jun 2024 13:25:27 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 880B043262; Tue, 25 Jun 2024 13:18:37 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.19]) by mails.dpdk.org (Postfix) with ESMTP id C21EF42EC7 for ; Tue, 25 Jun 2024 13:17:14 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1719314235; x=1750850235; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Ctium1bAyF62Bd19dr7hzVbpQhbHcLZWROs1EIoZgjY=; b=anljbRT9N+xFG1shxnMBDHTl3ACYgjDaNd+8iOwmIvFwgWBRdeSweYyQ yF8Q7xL0WJ1CSeKyolDR9kDz2uFVyxl+WXCUb39jk8vTYYPHLFt92HyhD o+b50Xw8dovFhfBfKzvKyf6dzzcTXk7NlJQ2/1/F638vpl5os3kmvmPaD oCnZ6WWi8wF/porvZg9gfOx6PhcAh/A1pSuw2Cncfv2e892VQEwQZC0zC 3UM2MZxDaZPRxJAk1n9dnkjMXp8wcJk/3p6WcirnaNe3mgXJkH4U2UEL0 20YTQO4cGoTdtT6cufX+Hr0E5kpw//Eat7YiP5vudJODIC4fAaSWlA+BF A==; X-CSE-ConnectionGUID: ueiAX1KsRxChhkkzIqh89w== X-CSE-MsgGUID: sAOhLodJSg+BIbM0Pe/C5A== X-IronPort-AV: E=McAfee;i="6700,10204,11113"; a="16080417" X-IronPort-AV: E=Sophos;i="6.08,263,1712646000"; d="scan'208";a="16080417" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by fmvoesa113.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jun 2024 04:17:13 -0700 X-CSE-ConnectionGUID: SQp7yf99RnWB/ARqFeqSkQ== X-CSE-MsgGUID: S3sJDT4XSKq3z2n31g0w8g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,263,1712646000"; d="scan'208";a="43719522" Received: from unknown (HELO silpixa00401119.ir.intel.com) ([10.55.129.167]) by orviesa009.jf.intel.com with ESMTP; 25 Jun 2024 04:17:13 -0700 From: Anatoly Burakov To: dev@dpdk.org Cc: Sergey Temerkhanov , bruce.richardson@intel.com, ian.stokes@intel.com Subject: [PATCH v3 084/129] net/ice/base: refactor ETH56G PHY initialization Date: Tue, 25 Jun 2024 12:13:29 +0100 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Sergey Temerkhanov Assign the ETH56G PHY address according to the PCI IDs in preparation for further changes. Signed-off-by: Sergey Temerkhanov Signed-off-by: Ian Stokes --- drivers/net/ice/base/ice_ptp_hw.c | 39 +++++++++++++++++++----------- drivers/net/ice/base/ice_ptp_hw.h | 2 +- drivers/net/ice/base/ice_sbq_cmd.h | 2 +- drivers/net/ice/base/ice_type.h | 1 + 4 files changed, 28 insertions(+), 16 deletions(-) diff --git a/drivers/net/ice/base/ice_ptp_hw.c b/drivers/net/ice/base/ice_ptp_hw.c index e406c62a3a..9e59eecd9b 100644 --- a/drivers/net/ice/base/ice_ptp_hw.c +++ b/drivers/net/ice/base/ice_ptp_hw.c @@ -940,7 +940,7 @@ ice_write_phy_eth56g_raw_lp(struct ice_hw *hw, u32 reg_addr, u32 val, phy_msg.msg_addr_high = ICE_HI_WORD(reg_addr); phy_msg.data = val; - phy_msg.dest_dev = phy_56g; + phy_msg.dest_dev = hw->phy_addr; err = ice_sbq_rw_reg_lp(hw, &phy_msg, lock_sbq); @@ -970,7 +970,7 @@ ice_read_phy_eth56g_raw_lp(struct ice_hw *hw, u32 reg_addr, u32 *val, phy_msg.msg_addr_low = ICE_LO_WORD(reg_addr); phy_msg.msg_addr_high = ICE_HI_WORD(reg_addr); - phy_msg.dest_dev = phy_56g; + phy_msg.dest_dev = hw->phy_addr; err = ice_sbq_rw_reg_lp(hw, &phy_msg, lock_sbq); @@ -2291,6 +2291,8 @@ ice_ptp_read_tx_hwtstamp_status_eth56g(struct ice_hw *hw, u32 *ts_err) return 0; } +#define ICE_DEVID_MASK 0xFFF8 + /** * ice_ptp_init_phy_model - Initialize hw->phy_model based on device type * @hw: pointer to the HW struct @@ -2298,31 +2300,40 @@ ice_ptp_read_tx_hwtstamp_status_eth56g(struct ice_hw *hw, u32 *ts_err) * Determine the PHY configuration for the device, and initialize hw->phy_model * for use by other functions. */ -int ice_ptp_init_phy_model(struct ice_hw *hw) +void ice_ptp_init_phy_model(struct ice_hw *hw) { - int err; u32 phy_rev; - ice_sb_access_ena_eth56g(hw, true); + switch (hw->device_id & ICE_DEVID_MASK) { + case ICE_DEV_ID_E825C_BACKPLANE & ICE_DEVID_MASK: + hw->phy_addr = eth56g_dev_0; + break; + default: + hw->phy_addr = 0; + } - err = ice_read_phy_eth56g_raw_lp(hw, PHY_REG_REVISION, &phy_rev, - true); - if (err) - return err; + if (hw->phy_addr) { + int err; - if (phy_rev == PHY_REVISION_ETH56G) { - hw->phy_model = ICE_PHY_ETH56G; - return 0; + ice_sb_access_ena_eth56g(hw, true); + err = ice_read_phy_eth56g_raw_lp(hw, PHY_REG_REVISION, + &phy_rev, true); + if (err) + return; + + if (phy_rev == PHY_REVISION_ETH56G) { + hw->phy_model = ICE_PHY_ETH56G; + return; + } } if (ice_is_e810(hw)) hw->phy_model = ICE_PHY_E810; else hw->phy_model = ICE_PHY_E822; + hw->phy_ports = ICE_NUM_EXTERNAL_PORTS; hw->max_phy_port = ICE_NUM_EXTERNAL_PORTS; - - return 0; } /* E822 family functions diff --git a/drivers/net/ice/base/ice_ptp_hw.h b/drivers/net/ice/base/ice_ptp_hw.h index 42046239a4..5b6a729e94 100644 --- a/drivers/net/ice/base/ice_ptp_hw.h +++ b/drivers/net/ice/base/ice_ptp_hw.h @@ -302,7 +302,7 @@ ice_start_phy_timer_eth56g(struct ice_hw *hw, u8 port, bool bypass); int ice_phy_cfg_tx_offset_eth56g(struct ice_hw *hw, u8 port); int ice_phy_cfg_rx_offset_eth56g(struct ice_hw *hw, u8 port); -int ice_ptp_init_phy_model(struct ice_hw *hw); +void ice_ptp_init_phy_model(struct ice_hw *hw); #define PFTSYN_SEM_BYTES 4 diff --git a/drivers/net/ice/base/ice_sbq_cmd.h b/drivers/net/ice/base/ice_sbq_cmd.h index 4da16caf70..aad77af9a1 100644 --- a/drivers/net/ice/base/ice_sbq_cmd.h +++ b/drivers/net/ice/base/ice_sbq_cmd.h @@ -48,7 +48,7 @@ struct ice_sbq_evt_desc { }; enum ice_sbq_msg_dev { - phy_56g = 0x02, + eth56g_dev_0 = 0x02, rmn_0 = 0x02, rmn_1 = 0x03, rmn_2 = 0x04, diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h index b55b923055..9bccced824 100644 --- a/drivers/net/ice/base/ice_type.h +++ b/drivers/net/ice/base/ice_type.h @@ -1269,6 +1269,7 @@ struct ice_hw { u8 pf_id; /* device profile info */ enum ice_phy_model phy_model; + u8 phy_addr; /* PHY address */ u8 phy_ports; u8 max_phy_port; u8 logical_pf_id; -- 2.43.0