From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 92E961DB1 for ; Mon, 8 Jun 2015 04:21:39 +0200 (CEST) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga101.jf.intel.com with ESMTP; 07 Jun 2015 19:21:39 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.13,571,1427785200"; d="scan'208";a="739132103" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by fmsmga002.fm.intel.com with ESMTP; 07 Jun 2015 19:21:38 -0700 Received: from shecgisg003.sh.intel.com (shecgisg003.sh.intel.com [10.239.29.90]) by shvmail01.sh.intel.com with ESMTP id t582Lb6P032240; Mon, 8 Jun 2015 10:21:37 +0800 Received: from shecgisg003.sh.intel.com (localhost [127.0.0.1]) by shecgisg003.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id t582LYQv005644; Mon, 8 Jun 2015 10:21:36 +0800 Received: (from yliu84x@localhost) by shecgisg003.sh.intel.com (8.13.6/8.13.6/Submit) id t582LY6H005640; Mon, 8 Jun 2015 10:21:34 +0800 From: Yong Liu To: dts@dpdk.org Date: Mon, 8 Jun 2015 10:21:25 +0800 Message-Id: <1433730088-5601-2-git-send-email-yong.liu@intel.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1433730088-5601-1-git-send-email-yong.liu@intel.com> References: <1433730088-5601-1-git-send-email-yong.liu@intel.com> Subject: [dts] [PATCH 1/4] Optimize get core list function for Haswell cpu. X-BeenThere: dts@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: test suite reviews and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 08 Jun 2015 02:21:40 -0000 From: Marvin Liu Create cpu id map for core allocation. Haswell cpu default core id is [0, 1, 2, 3, 4, 8, 9, 10, 11, 16, 17, 18, 19, 20, 24, 25, 26, 27]. After conversion, cpu core id will be [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17]. Change set object to list object in get_core_list for get core in sequence. Signed-off-by: Marvin Liu diff --git a/framework/crb.py b/framework/crb.py index 2c01d48..f6ac811 100644 --- a/framework/crb.py +++ b/framework/crb.py @@ -423,6 +423,10 @@ class Crb(object): "grep --color=never \"processor\\|physical id\\|core id\\|^$\" /proc/cpuinfo", "#", alt_session=True) cpuinfo = cpuinfo.split('\r\n\r\n') + # haswell cpu on cottonwood core id not correct + # need addtional coremap for haswell cpu + core_id = 0 + coremap = {} for line in cpuinfo: m = re.search("processor\t: (\d+)\r\n" + "physical id\t: (\d+)\r\n" + @@ -432,11 +436,16 @@ class Crb(object): thread = m.group(1) socket = m.group(2) core = m.group(3) + + if core not in coremap.keys(): + coremap[core] = core_id + core_id += 1 + if self.crb['bypass core0'] and core == '0' and socket == '0': self.logger.info("Core0 bypassed") continue self.cores.append( - {'thread': thread, 'socket': socket, 'core': core}) + {'thread': thread, 'socket': socket, 'core': coremap[core]}) self.number_of_cores = len(self.cores) @@ -559,9 +568,9 @@ class Crb(object): temp = [] for sock in sockList: - core_list = set([int(n['core']) for n in partial_cores if int( + core_list = list([int(n['core']) for n in partial_cores if int( n['socket']) == sock]) - core_list = list(core_list)[:nr_cores] + core_list = core_list[:nr_cores] temp.extend(core_list) core_list = temp @@ -579,9 +588,9 @@ class Crb(object): coreList_aux = [int(core_list[n])for n in range( (nr_cores * i), (nr_cores * i + nr_cores))] for core in coreList_aux: - thread_list = set([int(n['thread']) for n in partial_cores if ( + thread_list = list([int(n['thread']) for n in partial_cores if ( (int(n['core']) == core) and (int(n['socket']) == sock))]) - thread_list = list(thread_list)[:nr_threads] + thread_list = thread_list[:nr_threads] temp.extend(thread_list) thread_list = temp i += 1 -- 1.9.3