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From: "xu,gang" <gangx.xu@intel.com>
To: dts@dpdk.org
Cc: "xu,gang" <gangx.xu@intel.com>
Subject: [dts] [PATCH V2 08/10] add ip_pipeline parser_cleanup test plan
Date: Thu, 25 Aug 2016 16:24:21 +0800	[thread overview]
Message-ID: <1472113463-4298-8-git-send-email-gangx.xu@intel.com> (raw)
In-Reply-To: <1472113463-4298-1-git-send-email-gangx.xu@intel.com>

Signed-off-by: xu,gang <gangx.xu@intel.com>
---
 .../ip_pipeline_parser_cleanup_test_plan.rst       | 373 +++++++++++++++++++++
 1 file changed, 373 insertions(+)
 create mode 100644 test_plans/ip_pipeline_parser_cleanup_test_plan.rst

diff --git a/test_plans/ip_pipeline_parser_cleanup_test_plan.rst b/test_plans/ip_pipeline_parser_cleanup_test_plan.rst
new file mode 100644
index 0000000..51b5d55
--- /dev/null
+++ b/test_plans/ip_pipeline_parser_cleanup_test_plan.rst
@@ -0,0 +1,373 @@
+1. Test config parser for pipeline passthrough
+
+2. Test config parser for pipeline flow classification(need to test based on bugs raised)
+
+3. Test config parser for pipeline flow action
+
+4. Test config parser for pipeline firewall
+
+5. Test config parser for pipeline routing
+
+6. Add multiple whitespaces between argumetns in pktq_in/out and msgq_in/out section
+
+7. Create cfg files with all kinds of errors(like the section not supposed to be there, or out of range value)
+
+8. In pipeline specific cfg section, write n_rules=4k/64k/512k/16M and check if the table memory have the same size of n_rules=4096/65536... exact values
+(problems is how to check the table memory, need to check with dev???)
+
+--------------------------------------------------
+1. An invalid entry should be recognized(negative)
+--------------------------------------------------
+Config file as follows, pipeline is passthrough
+[PIPELINE0]
+type = MASTER
+core = 0
+
+[PIPELINE1]
+type = PASS-THROUGH
+core = s1c1
+pktq_in = RXQ0.0 RXQ1.0
+pktq_out = TXQ1.0 TXQ0.0
+dma_src_offset = 278; mbuf (128) + headroom (128) + 1st ethertype offset (14) + ttl offset within ip header = 278 (ipv4)
+dma_dst_offset = 128; mbuf (128)
+dma_size = 16
+dma_src_mask = 00FF0000FFFFFFFFFFFFFFFFFFFFFFFF
+dma_hash_offset = 144; (dma_dst_offset+dma_size)
+lb = hash
+test = 123
+Command to run: ./build/ip_pipeline -p 3 -f ./config/parsercleanup/pt1_mesgq_2ports.cfg
+check that an invalid entry is recognized by config parser, "lb" is not a recognized entry, it should report the error, if yes, test pass, otherwise, test fail
+
+pipeline> [APP] Initializing PIPELINE1 ...
+[PIPELINE1] Pass-through
+Parse error in section "PIPELINE1": invalid entry "test"
+PANIC in app_init_pipelines():
+Pipeline instance "PIPELINE1" back-end init error
+7: [./build/ip_pipeline() [0x432615]]
+6: [/lib64/libc.so.6(__libc_start_main+0xf5) [0x33dca21d65]]
+5: [./build/ip_pipeline(main+0x5f) [0x43187f]]
+4: [./build/ip_pipeline(app_init+0x15b8) [0x4419e8]]
+3: [./build/ip_pipeline() [0x43f85b]]
+2: [./build/ip_pipeline(__rte_panic+0xc9) [0x42c33c]]
+1: [./build/ip_pipeline(rte_dump_stack+0x1a) [0x4d5dca]]
+Aborted (core dumped)
+
+--------------------------------------------------------------
+2. Multiple whitespaces between arguments in pktq_in entry
+--------------------------------------------------------------
+Config file as follows
+[PIPELINE0]
+type = MASTER
+core = 0
+
+[PIPELINE1]
+type = PASS-THROUGH
+core = s1c1
+pktq_in = RXQ0.0  RXQ1.0
+pktq_out = TXQ1.0 TXQ0.0
+dma_src_offset = 278; mbuf (128) + headroom (128) + 1st ethertype offset (14) + ttl offset within ip header = 278 (ipv4)
+dma_dst_offset = 128; mbuf (128)
+dma_size = 16
+dma_src_mask = 00FF0000FFFFFFFFFFFFFFFFFFFFFFFF
+dma_hash_offset = 144; (dma_dst_offset+dma_size)
+Command to run: ./build/ip_pipeline -p 3 -f ./config/parsercleanup/pt1_mesgq_2ports.cfg
+Check that the config parser can recognize the multiple whitespaces between each argument of pktq_in. If yes, test passed, otherwise, test failed.
+
+--------------------------------------------------------------
+3. Multiple whitespaces between arguments in pktq_out entry
+--------------------------------------------------------------
+Config file as follows
+[PIPELINE0]
+type = MASTER
+core = 0
+
+[PIPELINE1]
+type = PASS-THROUGH
+core = s1c1
+pktq_in = RXQ0.0 RXQ1.0
+pktq_out = TXQ1.0  TXQ0.0
+dma_src_offset = 278; mbuf (128) + headroom (128) + 1st ethertype offset (14) + ttl offset within ip header = 278 (ipv4)
+dma_dst_offset = 128; mbuf (128)
+dma_size = 16
+dma_src_mask = 00FF0000FFFFFFFFFFFFFFFFFFFFFFFF
+dma_hash_offset = 144; (dma_dst_offset+dma_size)
+;lb = hash
+Command to run: ./build/ip_pipeline -p 3 -f ./config/parsercleanup/pt1_mesgq_2ports.cfg
+Check that the config parser can recognize the multiple whitespaces between each argument of pktq_out. If yes, test passed, otherwise, test failed.
+
+--------------------------------------------------------------
+4. Multiple whitespaces between arguments in msgq_in entry
+--------------------------------------------------------------
+Config file as follows
+[PIPELINE0]
+type = MASTER
+core = s0c0
+;msgq_in = MSGQ-REQ-PIPELINE0 ; for customer in .cfg.out, can not assign in .cfg file, because these are used as the communication for master and other pipeline.
+;msgq_out = MSGQ-RSP-PIPELINE0
+timer_period = 1
+
+[PIPELINE1]
+type = PASS-THROUGH
+core = s0c1
+pktq_in = RXQ0.0 RXQ1.0
+pktq_out = TXQ0.0 TXQ1.0
+msgq_in = MSGQ0  MSGQ1 MSGQ2 MSGQ3 ;MSGQ-REQ-PIPELINE1, dev will confirm on how to use it
+msgq_out = MSGQ0 MSGQ1 MSGQ2 MSGQ3 ;MSGQ-RSP-PIPELINE1
+timer_period = 100
+
+Command to run: ./build/ip_pipeline -p 3 -f ./config/parsercleanup/pt1_mesgq_2ports.cfg
+Check that the config parser can recognize the multiple whitespaces between each argument of msgq_in. If yes, test passed, otherwise, test failed.
+
+--------------------------------------------------------------
+5. Multiple whitespaces between arguments in msgq_out entry
+--------------------------------------------------------------
+Config file as follows
+[PIPELINE0]
+type = MASTER
+core = s0c0
+;msgq_in = MSGQ-REQ-PIPELINE0
+;msgq_out = MSGQ-RSP-PIPELINE0
+timer_period = 1
+
+[PIPELINE1]
+type = PASS-THROUGH
+core = s0c1
+pktq_in = RXQ0.0 RXQ1.0
+pktq_out = TXQ0.0 TXQ1.0
+msgq_in = MSGQ0 MSGQ1 MSGQ2 MSGQ3 ;MSGQ-REQ-PIPELINE1
+msgq_out = MSGQ0        MSGQ1 MSGQ2 MSGQ3 ;MSGQ-RSP-PIPELINE1
+timer_period = 100
+
+Command to run: ./build/ip_pipeline -p 3 -f ./config/parsercleanup/pt1_mesgq_2ports.cfg
+Check that the config parser can recognize the multiple whitespaces between each argument of msgq_in. If yes, test passed, otherwise, test failed.
+
+-----------------------------------
+6. Not recognized section(negative)
+-----------------------------------
+Config file as follows
+[PIPELINE0]
+type = MASTER
+core = 0
+
+[PIPELINE1]
+type = PASS-THROUGH
+core = s1c1
+pktq_in = RXQ0.0 RXQ1.0
+pktq_out = TXQ1.0 TXQ0.0
+dma_src_offset = 278; mbuf (128) + headroom (128) + 1st ethertype offset (14) + ttl offset within ip header = 278 (ipv4)
+dma_dst_offset = 128; mbuf (128)
+dma_size = 16
+dma_src_mask = 00FF0000FFFFFFFFFFFFFFFFFFFFFFFF
+dma_hash_offset = 144; (dma_dst_offset+dma_size)
+;lb = hash
+
+[TESTSECTION]
+type = flow classification
+
+Command to run: ./build/ip_pipeline -p 3 -f ./config/parsercleanup/pt1_2ports.cfg
+Check that the config parser can report out the invalid section and print out "CFG:....." messages. If yes, test passed, otherwise, test failed.
+
+---------------------------------
+7. Not recognized entry(negative)
+---------------------------------
+Config file as follows
+[PIPELINE0]
+type = MASTER
+core = 0
+
+[PIPELINE1]
+type = PASS-THROUGH
+core = s1c1
+pktq_in = RXQ0.0 RXQ1.0
+pktq_out = TXQ1.0 TXQ0.0
+dma_src_offset = 278; mbuf (128) + headroom (128) + 1st ethertype offset (14) + ttl offset within ip header = 278 (ipv4)
+dma_dst_offset = 128; mbuf (128)
+dma_size = 16
+dma_src_mask = 00FF0000FFFFFFFFFFFFFFFFFFFFFFFF
+dma_hash_offset = 144; (dma_dst_offset+dma_size)
+;lb = hash
+test = value
+
+Command to run: ./build/ip_pipeline -p 3 -f ./config/parsercleanup/pt1_2ports.cfg
+Check that the config parser can report out the invalid section and print out "CFG:....." messages. If yes, test passed, otherwise, test failed.
+
+--------------------------------------------------------------
+8. Check that the n_rules can equal to 4k and the table memory have the same size of n_rules=4096(need to check with dev how to check the table memory)
+firewall can not be seem, use flow classifcaion, n_flows, check table size
+[PIPELINE2] Flow classification
+TABLE: rte_table_hash_create_key16_ext: Hash table memory footprint is 397440 bytes
+--------------------------------------------------------------
+Config file as follows
+[PIPELINE0]
+type = MASTER
+core = 0
+
+[PIPELINE1]
+type = PASS-THROUGH
+core = s1c1
+pktq_in = RXQ0.0 RXQ1.0
+pktq_out = SWQ0 SWQ1
+dma_size = 16
+dma_dst_offset = 192; mbuf (128) + 64
+dma_src_offset = 278; mbuf (128) + headroom (128) + ethernet header (14) + ttl offset within ip header (8) = 278
+dma_src_mask = 00FF0000FFFFFFFFFFFFFFFFFFFFFFFF; ipv4 5-tuple
+dma_hash_offset = 208; dma_dst_offset + dma_size
+
+[PIPELINE2]
+type = FLOW_CLASSIFICATION
+core = s1c2
+pktq_in = SWQ0 SWQ1
+pktq_out = TXQ1.0 TXQ0.0
+n_flows = 4k
+key_offset = 192; dma_dst_offset
+key_size = 16; dma_size
+hash_offset = 208; dma_hash_offset = 80
+
+Command to run: ./build/ip_pipeline -p 3 -f ./config/parsercleanup/fc_2ports.cfg
+Check that app runs successfully and the table memory have the same size of n_flows=4096 If yes, test passed, otherwise, test failed.
+
+--------------------------------------------------------------
+9. Check that the n_rules can equal to 64k and the table memory have the same size of n_rules=65536(need to check with dev how to check the table memory)
+[PIPELINE2] Flow classification
+TABLE: rte_table_hash_create_key16_ext: Hash table memory footprint is 6357120 bytes
+--------------------------------------------------------------
+Config file as follows
+[PIPELINE0]
+type = MASTER
+core = 0
+
+[PIPELINE1]
+type = PASS-THROUGH
+core = s1c1
+pktq_in = RXQ0.0 RXQ1.0
+pktq_out = SWQ0 SWQ1
+dma_size = 16
+dma_dst_offset = 192; mbuf (128) + 64
+dma_src_offset = 278; mbuf (128) + headroom (128) + ethernet header (14) + ttl offset within ip header (8) = 278
+dma_src_mask = 00FF0000FFFFFFFFFFFFFFFFFFFFFFFF; ipv4 5-tuple
+dma_hash_offset = 208; dma_dst_offset + dma_size
+
+[PIPELINE2]
+type = FLOW_CLASSIFICATION
+core = s1c2
+pktq_in = SWQ0 SWQ1
+pktq_out = TXQ1.0 TXQ0.0
+n_flows = 64k
+key_offset = 192; dma_dst_offset
+key_size = 16; dma_size
+hash_offset = 208; dma_hash_offset = 80
+
+Command to run: ./build/ip_pipeline -p 3 -f ./config/parsercleanup/fc_2ports.cfg
+Check that app runs successfully and the table memory have the same size of n_rules=65536 If yes, test passed, otherwise, test failed.
+
+--------------------------------------------------------------
+10. Check that the n_rules can equal to 512k and the table memory have the same size of n_rules=524288(need to check with dev how to check the table memory)
+[PIPELINE2] Flow classification
+TABLE: rte_table_hash_create_key16_ext: Hash table memory footprint is 50856064 bytes
+--------------------------------------------------------------
+Config file as follows
+[PIPELINE0]
+type = MASTER
+core = 0
+
+[PIPELINE1]
+type = PASS-THROUGH
+core = s1c1
+pktq_in = RXQ0.0 RXQ1.0
+pktq_out = SWQ0 SWQ1
+dma_size = 16
+dma_dst_offset = 192; mbuf (128) + 64
+dma_src_offset = 278; mbuf (128) + headroom (128) + ethernet header (14) + ttl offset within ip header (8) = 278
+dma_src_mask = 00FF0000FFFFFFFFFFFFFFFFFFFFFFFF; ipv4 5-tuple
+dma_hash_offset = 208; dma_dst_offset + dma_size
+
+[PIPELINE2]
+type = FLOW_CLASSIFICATION
+core = s1c2
+pktq_in = SWQ0 SWQ1
+pktq_out = TXQ1.0 TXQ0.0
+n_flows = 512k
+key_offset = 192; dma_dst_offset
+key_size = 16; dma_size
+hash_offset = 208; dma_hash_offset = 80
+
+Command to run: ./build/ip_pipeline -p 3 -f ./config/parsercleanup/fc_2ports.cfg
+Check that app runs successfully and the table memory have the same size of n_rules=524288 If yes, test passed, otherwise, test failed.
+
+--------------------------------------------------------------
+11. Check that the n_rules can equal to 16M and the table memory have the same size of n_rules=16777216(need to check with dev how to check the table memory), maximum is 2^32, use 2^32+1 to test out of range
+[PIPELINE2] Flow classification
+TABLE: rte_table_hash_create_key16_ext: Hash table memory footprint is 1627390080 bytes
+--------------------------------------------------------------
+Config file as follows
+[PIPELINE0]
+type = MASTER
+core = 0
+
+[PIPELINE1]
+type = PASS-THROUGH
+core = s1c1
+pktq_in = RXQ0.0 RXQ1.0
+pktq_out = SWQ0 SWQ1
+dma_size = 16
+dma_dst_offset = 192; mbuf (128) + 64
+dma_src_offset = 278; mbuf (128) + headroom (128) + ethernet header (14) + ttl offset within ip header (8) = 278
+dma_src_mask = 00FF0000FFFFFFFFFFFFFFFFFFFFFFFF; ipv4 5-tuple
+dma_hash_offset = 208; dma_dst_offset + dma_size
+
+[PIPELINE2]
+type = FLOW_CLASSIFICATION
+core = s1c2
+pktq_in = SWQ0 SWQ1
+pktq_out = TXQ1.0 TXQ0.0
+n_flows = 16M
+key_offset = 192; dma_dst_offset
+key_size = 16; dma_size
+hash_offset = 208; dma_hash_offset = 80
+
+Command to run: ./build/ip_pipeline -p 3 -f ./config/parsercleanup/fc_2ports.cfg
+Check that app runs successfully and the table memory have the same size of n_rules=16777216 If yes, test passed, otherwise, test failed.
+
+--------------------------------------------------------------
+12. Check that the n_rules can equal to 16M+1 and the table memory have the same size of n_rules=16777216(need to check with dev how to check the table memory), maximum is 2^32, use 2^32+1 to test out of range
+[PIPELINE2] Flow classification
+Parse error in section "PIPELINE2": entry "n_flows" has invalid value ("16M+1")
+PANIC in app_init_pipelines():
+Pipeline instance "PIPELINE2" back-end init error
+7: [./build/ip_pipeline() [0x431925]]
+6: [/lib64/libc.so.6(__libc_start_main+0xf5) [0x33dca21d65]]
+5: [./build/ip_pipeline(main+0x5f) [0x4304ff]]
+4: [./build/ip_pipeline(app_init+0x13fb) [0x43f3bb]]
+3: [./build/ip_pipeline() [0x43d449]]
+2: [./build/ip_pipeline(__rte_panic+0xc9) [0x42af1a]]
+1: [./build/ip_pipeline(rte_dump_stack+0x1a) [0x4c8c6a]]
+Aborted (core dumped)
+--------------------------------------------------------------
+Config file as follows
+[PIPELINE0]
+type = MASTER
+core = 0
+
+[PIPELINE1]
+type = PASS-THROUGH
+core = s1c1
+pktq_in = RXQ0.0 RXQ1.0
+pktq_out = SWQ0 SWQ1
+dma_size = 16
+dma_dst_offset = 192; mbuf (128) + 64
+dma_src_offset = 278; mbuf (128) + headroom (128) + ethernet header (14) + ttl offset within ip header (8) = 278
+dma_src_mask = 00FF0000FFFFFFFFFFFFFFFFFFFFFFFF; ipv4 5-tuple
+dma_hash_offset = 208; dma_dst_offset + dma_size
+
+[PIPELINE2]
+type = FLOW_CLASSIFICATION
+core = s1c2
+pktq_in = SWQ0 SWQ1
+pktq_out = TXQ1.0 TXQ0.0
+n_flows = 16M+1
+key_offset = 192; dma_dst_offset
+key_size = 16; dma_size
+hash_offset = 208; dma_hash_offset = 80
+
+Command to run: ./build/ip_pipeline -p 3 -f ./config/parsercleanup/fc_2ports.cfg
+Check that app reports errors, if yes, test pass, otherwise, test fail
-- 
1.9.3

  parent reply	other threads:[~2016-08-25  8:29 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-08-25  8:24 [dts] [PATCH V2 01/10] add ip_pipeline cfg test code xu,gang
2016-08-25  8:24 ` [dts] [PATCH V2 02/10] add ip_pipeline cfg test plan xu,gang
2016-08-26  1:28   ` Liu, Yong
2016-08-25  8:24 ` [dts] [PATCH V2 03/10] add ip_pipeline cpu utilization test code xu,gang
2016-08-25  8:24 ` [dts] [PATCH V2 04/10] add ip_pipeline cpu utilization test plan xu,gang
2016-08-25  8:24 ` [dts] [PATCH V2 05/10] add ip_pipeline link_identification test code xu,gang
2016-08-25  8:24 ` [dts] [PATCH V2 06/10] add ip_pipeline link_identification test plan xu,gang
2016-08-26  2:19   ` Liu, Yong
2016-08-25  8:24 ` [dts] [dst][PATCH V2 07/10] add ip_pipeline parser_cleanup test code xu,gang
2016-08-25  8:24 ` xu,gang [this message]
2016-08-25  8:24 ` [dts] [PATCH V2 09/10] add ip_pipeline source_sink " xu,gang
2016-08-25  8:24 ` [dts] [PATCH V2 10/10] add ip_pipeline source_sink test plan xu,gang

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