From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id C0D75A2F6B for ; Tue, 8 Oct 2019 04:03:18 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 956811BFF0; Tue, 8 Oct 2019 04:03:18 +0200 (CEST) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by dpdk.org (Postfix) with ESMTP id D2D902986 for ; Tue, 8 Oct 2019 04:03:15 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 07 Oct 2019 19:03:14 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.67,269,1566889200"; d="scan'208";a="196469771" Received: from dpdk-lihong-ub1604.sh.intel.com ([10.67.118.203]) by orsmga003.jf.intel.com with ESMTP; 07 Oct 2019 19:03:13 -0700 From: lihong To: dts@dpdk.org Cc: lei.a.yao@intel.com, lihong Date: Tue, 8 Oct 2019 02:38:17 +0800 Message-Id: <1570473497-3935-1-git-send-email-lihongx.ma@intel.com> X-Mailer: git-send-email 2.7.4 Subject: [dts] [PATCH V1] test_plan: add test plan of power pstate X-BeenThere: dts@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: test suite reviews and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dts-bounces@dpdk.org Sender: "dts" Signed-off-by: lihong --- test_plans/power_pstate_test_plan.rst | 97 +++++++++++++++++++++++++++++++++++ 1 file changed, 97 insertions(+) create mode 100644 test_plans/power_pstate_test_plan.rst diff --git a/test_plans/power_pstate_test_plan.rst b/test_plans/power_pstate_test_plan.rst new file mode 100644 index 0000000..f2a5e19 --- /dev/null +++ b/test_plans/power_pstate_test_plan.rst @@ -0,0 +1,97 @@ +.. Copyright (c) <2019>, Intel Corporation + All rights reserved. + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions + are met: + + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in + the documentation and/or other materials provided with the + distribution. + + - Neither the name of Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived + from this software without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + OF THE POSSIBILITY OF SUCH DAMAGE. + +======================================= +Power Lib Based on Intel Pstate Driver +======================================= +Before DPDK 19.02 version, DPDK power lib is based on acpi-cpufreq driver in Linux. +From DPDK 19.02, Power lib start support intel_pstate driver. + +Prepare Settings +================ +1. Turn on Speedstep option in BIOS +2. Turn on CPU C3 and C6 +3. Turn on Turbo in BIOS +4. In BIOS set up the HWPM to "Native Mode" +5. Turn off "Hyper Threading" +6. Probe msr (used to get Intel CPU's no_turbo max frequency) + +Definition of CPU frequency in this test suite: +sys_min = sys/devices/system/cpu/cpu{}/cpufreq/cpuinfo_min_freq +sys_max = sys/devices/system/cpu/cpu{}/cpufreq/cpuinfo_max_freq +no_turbo_max = [rdmsr -p 1 0x0CE -f 15:8 -d]00000 + +Note: +For Intel Processor, If "Hyper Threading" enabled in BIOS, need change frequency on both HT core +at the same time to let the frequency take effect. +From DPDK 19.08, vm_power_manager will set fifo channel for each core. +Before DPDK 19.08, all core will share 1 fifo channel + +Test Case1 : Test Pstate lib basic action based on directly power command +=========================================================================== +Step 1. Create powermonitor fold for:: + + Create monitor channel folder, /tmp/powermonitor, give permission for read and write + +Step 2. Luanch VM power manager sample:: + + ./examples/vm_power_manager/build/vm_power_mgr -l 1-4 -n 4 --file-prefix=power --no-pci + +Step 3. Prepare different command in JSON format then send it to the fifo channel:: + + The command Sample as following: + {"instruction": { + "name": "policy", + "command": "power", + "unit": "SCALE_MAX" + }} + + Test with following 6 command type with following Sequency: + ENABLE_TURBO -> SCALE_MIN -> SCALE_MAX -> DISABLE_TURBO -> ENABLE_TURBO -> SCALE_UP -> SCALE_DOWN + cat command.json >/tmp/powermonitor/fifo{core_number} + :"SCALE_MAX": Scale frequency of this core to maximum + :"SCALE_MIN": Scale frequency of this core to minimum + :"SCALE_UP": Scale up frequency of this core + :"SCALE_DOWN": Scale down frequency of this core + :"ENABLE_TURBO": Enable Turbo Boost for this core + :"DISABLE_TURBO": Disable Turbo Boost for this core + +Step 4. Check the Core1 frequency for each command in Step 3:: + + min=sys/devices/system/cpu/cpu{}/cpufreq/scaling_min_freq + max=sys/devices/system/cpu/cpu{}/cpufreq/scaling_max_freq + Check point of Step SCALE_MIN: min=max=sys_min + Check point of Step SCALE_MAX: min=max=sys_max + Check point of Step DISABLE_TURBO: min=max=no_turbo_max + Check point of Step ENABLE_TURBO: min=max=no_turbo_max + Check point of Step SCALE_UP: min=max=sys_max + Check point of Step SCALE_DOWN: min=max=no_turbo_max -- 2.7.4