From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by dpdk.org (Postfix) with ESMTP id 3CBB81B3E2 for ; Thu, 2 Nov 2017 15:53:22 +0100 (CET) Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga105.fm.intel.com with ESMTP; 02 Nov 2017 07:53:17 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.44,334,1505804400"; d="scan'208";a="168430222" Received: from yuweizh1-mobl2.ccr.corp.intel.com ([10.255.25.75]) by orsmga005.jf.intel.com with ESMTP; 02 Nov 2017 07:53:16 -0700 From: Yuwei Zhang To: dts@dpdk.org Cc: Yuwei Zhang Date: Thu, 2 Nov 2017 22:53:14 +0800 Message-Id: <20171102145314.6344-1-yuwei1.zhang@intel.com> X-Mailer: git-send-email 2.14.1.windows.1 Subject: [dts] [PATCH V1] Add a function used to verify keep packets' order feature X-BeenThere: dts@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: test suite reviews and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 02 Nov 2017 14:53:23 -0000 use ixia to send and check packets' order captured which could be used to verify keep packets' order feature Signed-off-by: Yuwei Zhang --- framework/etgen.py | 20 ++++++++++++++++++++ framework/tester.py | 7 +++++++ 2 files changed, 27 insertions(+) diff --git a/framework/etgen.py b/framework/etgen.py index b19ae84..3892252 100644 --- a/framework/etgen.py +++ b/framework/etgen.py @@ -558,6 +558,26 @@ class IxiaPacketGenerator(SSHConnection): rxPortlist, txPortlist = self._configure_everything(port_list, rate_percent) return self.get_transmission_results(rxPortlist, txPortlist, delay) + def is_packet_ordered(self, port_list, rate_percent=100, delay=5, latency=False): + self.send_expect("port setFactoryDefaults %d %d %d" % (self.chasId, self.ports[0]['card'], self.ports[0]['port']), '%') + self.send_expect('port config -receiveMode [expr $::portCapture|$::portRxFirstTimeStamp|$::portRxSequenceChecking|$::portRxModeWidePacketGroup]', '%') + self.send_expect('port config -autonegotiate true', '%') + self.send_expect('lappend portTxList [list %d %d %d]' % (self.chasId, self.ports[0]['card'], self.ports[0]['port']), '%') + self.send_expect('ixWritePortsToHardware portTxList', '%') + self.send_expect('set streamId 1', '%') + self.send_expect('stream setDefault', '%') + self.send_expect('ixStartPortPacketGroups %d %d %d' % (self.chasId, self.ports[0]['card'], self.ports[0]['port']), '%') + self.send_expect('ixStartTransmit portTxList', '%') + self.send_expect('after 1000', '%') + self.send_expect('ixStopTransmit portTxList', '%') + self.send_expect('ixStopPortPacketGroups %d %d %d' % (self.chasId, self.ports[0]['card'], self.ports[0]['port']), '%') + self.send_expect('after 5000', '%') + self.send_expect('packetGroupStats get %d %d %d 1 1' % (self.chasId, self.ports[0]['card'], self.ports[0]['port']), '%') + self.send_expect('packetroupStats getGroup 1', '%') + self.send_expect('set reverseSequenceError [packetGroupStats cget -reverseSequenceError]]', '%') + output = self.send_expect('puts $reverseSequenceError', '%') + return int(output[:-2]) + def _configure_everything(self, port_list, rate_percent, latency=False): """ Prepare and configure IXIA ports for performance test. diff --git a/framework/tester.py b/framework/tester.py index 9208b0e..7062356 100644 --- a/framework/tester.py +++ b/framework/tester.py @@ -502,6 +502,13 @@ class Tester(Crb): return None return self.packet_gen.throughput(portList, rate_percent) + def verify_packet_order(self, portList, rate_percent=100, delay=5): + if self.check_port_list(portList, 'ixia'): + return self.ixia_packet_gen.is_packet_ordered(portList, rate_percent, delay) + else: + self.logger.warning("Only ixia port support check verify packet order function") + return False + def run_rfc2544(self, portlist, delay=120, permit_loss_rate=0): """ test_rate: the line rate we are going to test. -- 2.14.1.windows.1