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* Re: [dts] [dts 5/5] test_plans/vf_l3fwd_test_plan:update test plan to sync with testcase
  2020-09-07 15:35 ` [dts] [dts 5/5] test_plans/vf_l3fwd_test_plan:update " lingwei
@ 2020-09-07  8:21   ` Ma, LihongX
  0 siblings, 0 replies; 8+ messages in thread
From: Ma, LihongX @ 2020-09-07  8:21 UTC (permalink / raw)
  To: Ling, WeiX, dts; +Cc: Ling, WeiX



Regards,
Ma,lihong

> 
> +* Case config:
> +    For test vf_l3fwd perf, need to set "define RTE_TEST_RX_DESC_DEFAULT
> 2048" and "define RTE_TEST_TX_DESC_DEFAULT 20480"

Can you check the value RTE_TEST_TX_DESC_DEFAULT, I think it same as rx is 2048.

^ permalink raw reply	[flat|nested] 8+ messages in thread

* [dts] [PATCH V2 0/5] update test plan to sync with testcase
@ 2020-09-07 15:35 lingwei
  2020-09-07 15:35 ` [dts] [dts 1/5] test_plans/nic_single_core_perf_test_plan:update " lingwei
                   ` (4 more replies)
  0 siblings, 5 replies; 8+ messages in thread
From: lingwei @ 2020-09-07 15:35 UTC (permalink / raw)
  To: dts; +Cc: lingwei

update test plan to sync with testcase, V1 include another wrong file

lingwei (5):
  test_plans/nic_single_core_perf_test_plan:update test plan to sync
    with testcase
  test_plans/pmd_test_plan:update test plan to sync with testcase
  test_plans/vmdq_test_plan:update test plan to sync with testcase
  test_plans/ptpclient_test_plan:update test plan to sync with testcase
  test_plans/vf_l3fwd_test_plan:update test plan to sync with testcase

 test_plans/nic_single_core_perf_test_plan.rst | 7 +++++++
 test_plans/pmd_test_plan.rst                  | 7 +++++++
 test_plans/ptpclient_test_plan.rst            | 3 +++
 test_plans/vf_l3fwd_test_plan.rst             | 9 +++++++++
 test_plans/vmdq_test_plan.rst                 | 5 ++++-
 5 files changed, 30 insertions(+), 1 deletion(-)

-- 
2.17.1


^ permalink raw reply	[flat|nested] 8+ messages in thread

* [dts] [dts 1/5] test_plans/nic_single_core_perf_test_plan:update test plan to sync with testcase
  2020-09-07 15:35 [dts] [PATCH V2 0/5] update test plan to sync with testcase lingwei
@ 2020-09-07 15:35 ` lingwei
  2020-09-07 15:35 ` [dts] [dts 2/5] test_plans/pmd_test_plan:update " lingwei
                   ` (3 subsequent siblings)
  4 siblings, 0 replies; 8+ messages in thread
From: lingwei @ 2020-09-07 15:35 UTC (permalink / raw)
  To: dts; +Cc: lingwei

Signed-off-by: lingwei <weix.ling@intel.com>
---
 test_plans/nic_single_core_perf_test_plan.rst | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/test_plans/nic_single_core_perf_test_plan.rst b/test_plans/nic_single_core_perf_test_plan.rst
index 4157c31..c78abad 100644
--- a/test_plans/nic_single_core_perf_test_plan.rst
+++ b/test_plans/nic_single_core_perf_test_plan.rst
@@ -62,6 +62,13 @@ Prerequisites
 
     2 TG 25g ports for FVL25G ports
     4 TG 10g ports for 4 NNT10G ports
+
+4. Case config::
+    For FVL40g, if test 16 Byte Descriptor, need to set the "CONFIG_RTE_LIBRTE_I40E_16BYTE_RX_DESC=y"
+    in ./config/common_base and re-build DPDK.
+
+    For FVL25G, if test 16 Byte Descriptor, need to set the "CONFIG_RTE_LIBRTE_ICE_16BYTE_RX_DESC=y"
+    in ./config/common_base and re-build DPDK.
     
 Test Case : Single Core Performance Measurement
 ===============================================
-- 
2.17.1


^ permalink raw reply	[flat|nested] 8+ messages in thread

* [dts] [dts 2/5] test_plans/pmd_test_plan:update test plan to sync with testcase
  2020-09-07 15:35 [dts] [PATCH V2 0/5] update test plan to sync with testcase lingwei
  2020-09-07 15:35 ` [dts] [dts 1/5] test_plans/nic_single_core_perf_test_plan:update " lingwei
@ 2020-09-07 15:35 ` lingwei
  2020-09-07 15:35 ` [dts] [dts 3/5] test_plans/vmdq_test_plan:update " lingwei
                   ` (2 subsequent siblings)
  4 siblings, 0 replies; 8+ messages in thread
From: lingwei @ 2020-09-07 15:35 UTC (permalink / raw)
  To: dts; +Cc: lingwei

Signed-off-by: lingwei <weix.ling@intel.com>
---
 test_plans/pmd_test_plan.rst | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/test_plans/pmd_test_plan.rst b/test_plans/pmd_test_plan.rst
index f84fa55..c4d82cb 100644
--- a/test_plans/pmd_test_plan.rst
+++ b/test_plans/pmd_test_plan.rst
@@ -80,6 +80,13 @@ If using igb_uio::
    modprobe igb_uio
    usertools/dpdk-devbind.py --bind=igb_uio device_bus_id
 
+Case config::
+   For FVL40g, if test 16 Byte Descriptor, need to set the "CONFIG_RTE_LIBRTE_I40E_16BYTE_RX_DESC=y"
+   in ./config/common_base and re-build DPDK.
+
+   For FVL25G, if test 16 Byte Descriptor, need to set the "CONFIG_RTE_LIBRTE_ICE_16BYTE_RX_DESC=y"
+   in ./config/common_base and re-build DPDK.
+
 Test Case: Packet Checking
 ==========================
 
-- 
2.17.1


^ permalink raw reply	[flat|nested] 8+ messages in thread

* [dts] [dts 3/5] test_plans/vmdq_test_plan:update test plan to sync with testcase
  2020-09-07 15:35 [dts] [PATCH V2 0/5] update test plan to sync with testcase lingwei
  2020-09-07 15:35 ` [dts] [dts 1/5] test_plans/nic_single_core_perf_test_plan:update " lingwei
  2020-09-07 15:35 ` [dts] [dts 2/5] test_plans/pmd_test_plan:update " lingwei
@ 2020-09-07 15:35 ` lingwei
  2020-09-07 15:35 ` [dts] [dts 4/5] test_plans/ptpclient_test_plan:update " lingwei
  2020-09-07 15:35 ` [dts] [dts 5/5] test_plans/vf_l3fwd_test_plan:update " lingwei
  4 siblings, 0 replies; 8+ messages in thread
From: lingwei @ 2020-09-07 15:35 UTC (permalink / raw)
  To: dts; +Cc: lingwei

Signed-off-by: lingwei <weix.ling@intel.com>
---
 test_plans/vmdq_test_plan.rst | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/test_plans/vmdq_test_plan.rst b/test_plans/vmdq_test_plan.rst
index 1f19e6f..55ea0d7 100644
--- a/test_plans/vmdq_test_plan.rst
+++ b/test_plans/vmdq_test_plan.rst
@@ -66,7 +66,10 @@ Prerequisites
   to the pools numbers(e.g: for FVL spirit, it's 63, inclusive) as well as the MAC address from
   52:54:00:12:[port_index]:00 to 52:54:00:12:[port_index]:3e and the VLAN user priority field increments from 0 to 7
   (inclusive) for each VLAN ID. In our case port_index = 0 or 1.
-
+-Case config::
+   If test max queues per port 1024, need to set the "CONFIG_RTE_MAX_QUEUES_PER_PORT=1024" in ./config/common_base,
+   and need to set the "define MAX_QUEUES 1024" in ./examples/vmdq/main.c and re-build DPDK.
+   Note: different NIC, the MAX_QUEUES is different, eg: Fortville is 1024.
 
 Test Case: Measure VMDQ pools queues
 ------------------------------------
-- 
2.17.1


^ permalink raw reply	[flat|nested] 8+ messages in thread

* [dts] [dts 4/5] test_plans/ptpclient_test_plan:update test plan to sync with testcase
  2020-09-07 15:35 [dts] [PATCH V2 0/5] update test plan to sync with testcase lingwei
                   ` (2 preceding siblings ...)
  2020-09-07 15:35 ` [dts] [dts 3/5] test_plans/vmdq_test_plan:update " lingwei
@ 2020-09-07 15:35 ` lingwei
  2020-09-07 15:35 ` [dts] [dts 5/5] test_plans/vf_l3fwd_test_plan:update " lingwei
  4 siblings, 0 replies; 8+ messages in thread
From: lingwei @ 2020-09-07 15:35 UTC (permalink / raw)
  To: dts; +Cc: lingwei

Signed-off-by: lingwei <weix.ling@intel.com>
---
 test_plans/ptpclient_test_plan.rst | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/test_plans/ptpclient_test_plan.rst b/test_plans/ptpclient_test_plan.rst
index 64f3faa..7781bff 100644
--- a/test_plans/ptpclient_test_plan.rst
+++ b/test_plans/ptpclient_test_plan.rst
@@ -44,6 +44,9 @@ Prerequisites
 Assume one port is connected to the tester and "linuxptp.x86_64"
 has been installed on the tester.
 
+Case Config::
+    For support IEEE1588, need to set "CONFIG_RTE_LIBRTE_IEEE1588=y" in ./config/common_base and re-build DPDK.
+
 The sample should be validated on Forville, Niantic and i350 Nics. 
 
 Test case: ptp client
-- 
2.17.1


^ permalink raw reply	[flat|nested] 8+ messages in thread

* [dts] [dts 5/5] test_plans/vf_l3fwd_test_plan:update test plan to sync with testcase
  2020-09-07 15:35 [dts] [PATCH V2 0/5] update test plan to sync with testcase lingwei
                   ` (3 preceding siblings ...)
  2020-09-07 15:35 ` [dts] [dts 4/5] test_plans/ptpclient_test_plan:update " lingwei
@ 2020-09-07 15:35 ` lingwei
  2020-09-07  8:21   ` Ma, LihongX
  4 siblings, 1 reply; 8+ messages in thread
From: lingwei @ 2020-09-07 15:35 UTC (permalink / raw)
  To: dts; +Cc: lingwei

Signed-off-by: lingwei <weix.ling@intel.com>
---
 test_plans/vf_l3fwd_test_plan.rst | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/test_plans/vf_l3fwd_test_plan.rst b/test_plans/vf_l3fwd_test_plan.rst
index 8b51cef..ec0f1cb 100644
--- a/test_plans/vf_l3fwd_test_plan.rst
+++ b/test_plans/vf_l3fwd_test_plan.rst
@@ -82,6 +82,15 @@ Prerequisites
       | NIC-2,Port-1  ---  TG,Port-2 |
       +------------------------------+
 
+* Case config:
+    For test vf_l3fwd perf, need to set "define RTE_TEST_RX_DESC_DEFAULT 2048" and "define RTE_TEST_TX_DESC_DEFAULT 20480"
+    in ./examples/l3fwd/l3fwd.h and re-build l3fwd.
+  Note:
+    Only FVL need to change code to support iavf, when dpdk use iavf as default vf driver, no need to change code.
+    If test iavf on FVL, need to change "{ RTE_PCI_DEVICE(IAVF_INTEL_VENDOR_ID, IAVF_DEV_ID_ADAPTIVE_VF) }" to
+    "a { RTE_PCI_DEVICE(IAVF_INTEL_VENDOR_ID, IAVF_DEV_ID_VF) }" in ./drivers/net/iavf/iavf_ethdev.c,
+    and set "I40E_DEV_ID_VF 0x164C" in ./drivers/net/i40e/base/i40e_devids.h and re-build DPDK.
+
 Setup overview
 ==============
 
-- 
2.17.1


^ permalink raw reply	[flat|nested] 8+ messages in thread

* [dts] [dts 1/5] test_plans/nic_single_core_perf_test_plan:update test plan to sync with testcase
  2020-09-07 16:49 [dts] [PATCH V3 0/5] update " lingwei
@ 2020-09-07 16:49 ` lingwei
  0 siblings, 0 replies; 8+ messages in thread
From: lingwei @ 2020-09-07 16:49 UTC (permalink / raw)
  To: dts; +Cc: lingwei

Signed-off-by: lingwei <weix.ling@intel.com>
---
 test_plans/nic_single_core_perf_test_plan.rst | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/test_plans/nic_single_core_perf_test_plan.rst b/test_plans/nic_single_core_perf_test_plan.rst
index 4157c31..9fc5e01 100644
--- a/test_plans/nic_single_core_perf_test_plan.rst
+++ b/test_plans/nic_single_core_perf_test_plan.rst
@@ -62,6 +62,13 @@ Prerequisites
 
     2 TG 25g ports for FVL25G ports
     4 TG 10g ports for 4 NNT10G ports
+
+4. Case config::
+    For FVL40g, if test 16 Byte Descriptor, need to set the "CONFIG_RTE_LIBRTE_I40E_16BYTE_RX_DESC=y"
+    in ./config/common_base and re-build DPDK.
+
+    For CVL25G, if test 16 Byte Descriptor, need to set the "CONFIG_RTE_LIBRTE_ICE_16BYTE_RX_DESC=y"
+    in ./config/common_base and re-build DPDK.
     
 Test Case : Single Core Performance Measurement
 ===============================================
-- 
2.17.1


^ permalink raw reply	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2020-09-07  9:05 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-09-07 15:35 [dts] [PATCH V2 0/5] update test plan to sync with testcase lingwei
2020-09-07 15:35 ` [dts] [dts 1/5] test_plans/nic_single_core_perf_test_plan:update " lingwei
2020-09-07 15:35 ` [dts] [dts 2/5] test_plans/pmd_test_plan:update " lingwei
2020-09-07 15:35 ` [dts] [dts 3/5] test_plans/vmdq_test_plan:update " lingwei
2020-09-07 15:35 ` [dts] [dts 4/5] test_plans/ptpclient_test_plan:update " lingwei
2020-09-07 15:35 ` [dts] [dts 5/5] test_plans/vf_l3fwd_test_plan:update " lingwei
2020-09-07  8:21   ` Ma, LihongX
2020-09-07 16:49 [dts] [PATCH V3 0/5] update " lingwei
2020-09-07 16:49 ` [dts] [dts 1/5] test_plans/nic_single_core_perf_test_plan:update " lingwei

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