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From: Haiyang Zhao <haiyangx.zhao@intel.com>
To: dts@dpdk.org
Cc: lijuan.tu@intel.com, Haiyang Zhao <haiyangx.zhao@intel.com>
Subject: [dts] [PATCH V1] framework/crb: optimize code
Date: Fri, 26 Mar 2021 11:20:23 +0800
Message-ID: <20210326032023.26113-1-haiyangx.zhao@intel.com> (raw)

when the param dut_arch in conf/crbs.cfg not exist, dts will generate
a keyerror exception and terminate the test, but this param could not
be set actually.

Signed-off-by: Haiyang Zhao <haiyangx.zhao@intel.com>
---
 framework/crb.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/framework/crb.py b/framework/crb.py
index cd29b8e3..e7c1cc1c 100644
--- a/framework/crb.py
+++ b/framework/crb.py
@@ -666,7 +666,7 @@ class Crb(object):
             if self.crb['bypass core0'] and core == '0' and socket == '0':
                 self.logger.info("Core0 bypassed")
                 continue
-            if self.crb['dut arch'] == "arm64":
+            if self.crb.get('dut arch') == "arm64":
                 self.cores.append(
                         {'thread': thread, 'socket': node, 'core': coremap[core]})
             else:
-- 
2.17.1


             reply	other threads:[~2021-03-26  3:29 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-26  3:20 Haiyang Zhao [this message]
2021-03-26  3:31 ` Zhao, HaiyangX
2021-03-30  2:28   ` Tu, Lijuan

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