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* [dts] [PATCH] add testsuite coremask
@ 2015-10-22  8:22 yongjie
  2015-10-23  1:03 ` Liu, Yong
  0 siblings, 1 reply; 6+ messages in thread
From: yongjie @ 2015-10-22  8:22 UTC (permalink / raw)
  To: dts; +Cc: Gu yongjie

From: Gu yongjie <yongjiex.gu@intel.com>



This test will launch application "test" with different core mask(individual,all_cores,big,wrong),
and verify that whether the "test" respond correctly.

Signed-off-by: Gu yongjie <yongjiex.gu@intel.com>
---
 tests/TestSuite_coremask.py |  176 +++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 176 insertions(+), 0 deletions(-)
 create mode 100644 tests/TestSuite_coremask.py

diff --git a/tests/TestSuite_coremask.py b/tests/TestSuite_coremask.py
new file mode 100644
index 0000000..d1cc6e3
--- /dev/null
+++ b/tests/TestSuite_coremask.py
@@ -0,0 +1,176 @@
+# <COPYRIGHT_TAG>
+
+"""
+DPDK Test suite.
+
+Test coremask parsing in DPDK.
+
+"""
+
+import dts
+
+from exception import VerifyFailure
+from test_case import TestCase
+
+#
+#
+# Test class.
+#
+
+command_line = """./%s/app/test -c %s -n %d"""
+
+
+class TestCoremask(TestCase):
+
+    #
+    #
+    #
+    # Test cases.
+    #
+
+    def set_up_all(self):
+        """
+        Run at the start of each test suite.
+
+        Coremask Prerequisites.
+        """
+
+        self.port_mask = dts.create_mask(self.dut.get_ports(self.nic))
+        self.mem_channel = self.dut.get_memory_channels()
+
+        self.all_cores = self.dut.get_core_list("all")
+
+    def set_up(self):
+        """
+        Run before each test case.
+        """
+        pass
+
+    def test_individual_coremask(self):
+        """
+        Check coremask parsing for all the available cores one by one.
+        """
+
+        for core in self.all_cores:
+
+            core_mask = dts.create_mask([core])
+
+            command = command_line % (self.target, core_mask,
+                                      self.mem_channel)
+
+            out = self.dut.send_expect(command, "RTE>>", 10)
+
+            self.verify("EAL: Detected lcore %d as core" % core in out,
+                        "Core %d not detected" % core)
+
+            self.verify("EAL: Master lcore %d is ready" % core in out,
+                        "Core %d not ready" % core)
+
+            self.dut.send_expect("quit", "# ", 10)
+
+    def test_all_cores_coremask(self):
+        """
+        Check coremask parsing for all the cores at once.
+        """
+
+        core_mask = dts.create_mask(self.all_cores)
+
+        command = command_line % (self.target, core_mask, self.mem_channel)
+
+        out = self.dut.send_expect(command, "RTE>>", 10)
+
+        self.verify("EAL: Master lcore 0 is ready" in out,
+                    "Core 0 not ready")
+
+        self.verify("EAL: Detected lcore 0 as core" in out,
+                    "Core 0 not detected")
+
+        for core in self.all_cores[1:]:
+            self.verify("EAL: lcore %d is ready" % core in out,
+                        "Core %d not ready" % core)
+
+            self.verify("EAL: Detected lcore %d as core" % core in out,
+                        "Core %d not detected" % core)
+
+        self.dut.send_expect("quit", "# ", 10)
+
+    def test_big_coremask(self):
+        """
+        Check coremask parsing for more cores than available.
+        """
+
+        command_line = """./%s/app/test -c %s -n %d|tee out"""
+
+        # Default big coremask value 128
+        big_coremask_size = 128
+
+        try:
+            out = self.dut.send_expect("cat config/defconfig_%s" % self.target, "]# ", 10)
+            start_position = out.find('CONFIG_RTE_MAX_LCORE=')
+
+            if start_position > -1:
+                end_position = out.find('\n', start_position)
+                big_coremask_size = int(out[start_position + 21:end_position])
+
+                print "Detected CONFIG_RTE_MAX_LCORE=%d" % big_coremask_size
+        except:
+            print "Using default big coremask %d" % big_coremask_size
+
+        # Create a extremely big coremask
+        big_coremask = "0x"
+        for _ in range(0, big_coremask_size, 4):
+            big_coremask += "F"
+
+        command = command_line % (self.target, big_coremask, self.mem_channel)
+        try:
+            self.dut.send_expect(command, "RTE>>", 10)
+        except:
+            out = self.dut.send_expect("cat out", "# ")
+
+            self.verify("EAL: invalid coremask" in out,
+                    "Small core mask set")
+
+        self.verify("EAL: Detected lcore 0 as core" in out,
+                    "Core 0 not detected")
+
+        for core in self.all_cores[1:]:
+
+            self.verify("EAL: Detected lcore %d as core" % core in out,
+                        "Core %d not detected" % core)
+
+        self.dut.send_expect("quit", "# ", 10)
+
+    def test_wrong_coremask(self):
+        """
+        Check coremask parsing for wrong coremasks.
+        """
+
+        wrong_coremasks = ["GARBAGE", "0xJF", "0xFJF", "0xFFJ",
+                           "0xJ11", "0x1J1", "0x11J",
+                           "JF", "FJF", "FFJ",
+                           "J11", "1J1", "11J",
+                           "jf", "fjf", "ffj",
+                           "FF0x", "ff0x", "", "0x", "0"]
+
+        for coremask in wrong_coremasks:
+
+            command = command_line % (self.target, coremask, self.mem_channel)
+            try:
+                out = self.dut.send_expect(command, "# ", 5)
+                self.verify("EAL: invalid coremask" in out,
+                            "Wrong core mask (%s) accepted" % coremask)
+            except:
+                self.dut.send_expect("quit", "# ", 5)
+                raise VerifyFailure("Wrong core mask (%s) accepted" % coremask)
+
+    def tear_down(self):
+        """
+        Run after each test case.
+        """
+        self.dut.kill_all()
+
+    def tear_down_all(self):
+        """
+        Run after each test suite.
+        """
+        pass
-- 
1.7.4.4

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [dts] [PATCH] add testsuite coremask
  2015-10-22  8:22 [dts] [PATCH] add testsuite coremask yongjie
@ 2015-10-23  1:03 ` Liu, Yong
  0 siblings, 0 replies; 6+ messages in thread
From: Liu, Yong @ 2015-10-23  1:03 UTC (permalink / raw)
  To: yongjie, dts

Applied, thanks.

On 10/22/2015 04:22 PM, yongjie wrote:
> From: Gu yongjie <yongjiex.gu@intel.com>
>
>
>
> This test will launch application "test" with different core mask(individual,all_cores,big,wrong),
> and verify that whether the "test" respond correctly.
>
> Signed-off-by: Gu yongjie <yongjiex.gu@intel.com>
> ---
>   tests/TestSuite_coremask.py |  176 +++++++++++++++++++++++++++++++++++++++++++
>   1 files changed, 176 insertions(+), 0 deletions(-)
>   create mode 100644 tests/TestSuite_coremask.py
>
> diff --git a/tests/TestSuite_coremask.py b/tests/TestSuite_coremask.py
> new file mode 100644
> index 0000000..d1cc6e3
> --- /dev/null
> +++ b/tests/TestSuite_coremask.py
> @@ -0,0 +1,176 @@
> +# <COPYRIGHT_TAG>
> +
> +"""
> +DPDK Test suite.
> +
> +Test coremask parsing in DPDK.
> +
> +"""
> +
> +import dts
> +
> +from exception import VerifyFailure
> +from test_case import TestCase
> +
> +#
> +#
> +# Test class.
> +#
> +
> +command_line = """./%s/app/test -c %s -n %d"""
> +
> +
> +class TestCoremask(TestCase):
> +
> +    #
> +    #
> +    #
> +    # Test cases.
> +    #
> +
> +    def set_up_all(self):
> +        """
> +        Run at the start of each test suite.
> +
> +        Coremask Prerequisites.
> +        """
> +
> +        self.port_mask = dts.create_mask(self.dut.get_ports(self.nic))
> +        self.mem_channel = self.dut.get_memory_channels()
> +
> +        self.all_cores = self.dut.get_core_list("all")
> +
> +    def set_up(self):
> +        """
> +        Run before each test case.
> +        """
> +        pass
> +
> +    def test_individual_coremask(self):
> +        """
> +        Check coremask parsing for all the available cores one by one.
> +        """
> +
> +        for core in self.all_cores:
> +
> +            core_mask = dts.create_mask([core])
> +
> +            command = command_line % (self.target, core_mask,
> +                                      self.mem_channel)
> +
> +            out = self.dut.send_expect(command, "RTE>>", 10)
> +
> +            self.verify("EAL: Detected lcore %d as core" % core in out,
> +                        "Core %d not detected" % core)
> +
> +            self.verify("EAL: Master lcore %d is ready" % core in out,
> +                        "Core %d not ready" % core)
> +
> +            self.dut.send_expect("quit", "# ", 10)
> +
> +    def test_all_cores_coremask(self):
> +        """
> +        Check coremask parsing for all the cores at once.
> +        """
> +
> +        core_mask = dts.create_mask(self.all_cores)
> +
> +        command = command_line % (self.target, core_mask, self.mem_channel)
> +
> +        out = self.dut.send_expect(command, "RTE>>", 10)
> +
> +        self.verify("EAL: Master lcore 0 is ready" in out,
> +                    "Core 0 not ready")
> +
> +        self.verify("EAL: Detected lcore 0 as core" in out,
> +                    "Core 0 not detected")
> +
> +        for core in self.all_cores[1:]:
> +            self.verify("EAL: lcore %d is ready" % core in out,
> +                        "Core %d not ready" % core)
> +
> +            self.verify("EAL: Detected lcore %d as core" % core in out,
> +                        "Core %d not detected" % core)
> +
> +        self.dut.send_expect("quit", "# ", 10)
> +
> +    def test_big_coremask(self):
> +        """
> +        Check coremask parsing for more cores than available.
> +        """
> +
> +        command_line = """./%s/app/test -c %s -n %d|tee out"""
> +
> +        # Default big coremask value 128
> +        big_coremask_size = 128
> +
> +        try:
> +            out = self.dut.send_expect("cat config/defconfig_%s" % self.target, "]# ", 10)
> +            start_position = out.find('CONFIG_RTE_MAX_LCORE=')
> +
> +            if start_position > -1:
> +                end_position = out.find('\n', start_position)
> +                big_coremask_size = int(out[start_position + 21:end_position])
> +
> +                print "Detected CONFIG_RTE_MAX_LCORE=%d" % big_coremask_size
> +        except:
> +            print "Using default big coremask %d" % big_coremask_size
> +
> +        # Create a extremely big coremask
> +        big_coremask = "0x"
> +        for _ in range(0, big_coremask_size, 4):
> +            big_coremask += "F"
> +
> +        command = command_line % (self.target, big_coremask, self.mem_channel)
> +        try:
> +            self.dut.send_expect(command, "RTE>>", 10)
> +        except:
> +            out = self.dut.send_expect("cat out", "# ")
> +
> +            self.verify("EAL: invalid coremask" in out,
> +                    "Small core mask set")
> +
> +        self.verify("EAL: Detected lcore 0 as core" in out,
> +                    "Core 0 not detected")
> +
> +        for core in self.all_cores[1:]:
> +
> +            self.verify("EAL: Detected lcore %d as core" % core in out,
> +                        "Core %d not detected" % core)
> +
> +        self.dut.send_expect("quit", "# ", 10)
> +
> +    def test_wrong_coremask(self):
> +        """
> +        Check coremask parsing for wrong coremasks.
> +        """
> +
> +        wrong_coremasks = ["GARBAGE", "0xJF", "0xFJF", "0xFFJ",
> +                           "0xJ11", "0x1J1", "0x11J",
> +                           "JF", "FJF", "FFJ",
> +                           "J11", "1J1", "11J",
> +                           "jf", "fjf", "ffj",
> +                           "FF0x", "ff0x", "", "0x", "0"]
> +
> +        for coremask in wrong_coremasks:
> +
> +            command = command_line % (self.target, coremask, self.mem_channel)
> +            try:
> +                out = self.dut.send_expect(command, "# ", 5)
> +                self.verify("EAL: invalid coremask" in out,
> +                            "Wrong core mask (%s) accepted" % coremask)
> +            except:
> +                self.dut.send_expect("quit", "# ", 5)
> +                raise VerifyFailure("Wrong core mask (%s) accepted" % coremask)
> +
> +    def tear_down(self):
> +        """
> +        Run after each test case.
> +        """
> +        self.dut.kill_all()
> +
> +    def tear_down_all(self):
> +        """
> +        Run after each test suite.
> +        """
> +        pass

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [dts] [PATCH] add testsuite coremask
@ 2015-10-22  7:31 yongjie
  0 siblings, 0 replies; 6+ messages in thread
From: yongjie @ 2015-10-22  7:31 UTC (permalink / raw)
  To: dts; +Cc: Gu yongjie

From: Gu yongjie <yongjiex.gu@intel.com>


Signed-off-by: Gu yongjie <yongjiex.gu@intel.com>
---
 tests/TestSuite_coremask.py |  176 +++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 176 insertions(+), 0 deletions(-)
 create mode 100644 tests/TestSuite_coremask.py

diff --git a/tests/TestSuite_coremask.py b/tests/TestSuite_coremask.py
new file mode 100644
index 0000000..d1cc6e3
--- /dev/null
+++ b/tests/TestSuite_coremask.py
@@ -0,0 +1,176 @@
+# <COPYRIGHT_TAG>
+
+"""
+DPDK Test suite.
+
+Test coremask parsing in DPDK.
+
+"""
+
+import dts
+
+from exception import VerifyFailure
+from test_case import TestCase
+
+#
+#
+# Test class.
+#
+
+command_line = """./%s/app/test -c %s -n %d"""
+
+
+class TestCoremask(TestCase):
+
+    #
+    #
+    #
+    # Test cases.
+    #
+
+    def set_up_all(self):
+        """
+        Run at the start of each test suite.
+
+        Coremask Prerequisites.
+        """
+
+        self.port_mask = dts.create_mask(self.dut.get_ports(self.nic))
+        self.mem_channel = self.dut.get_memory_channels()
+
+        self.all_cores = self.dut.get_core_list("all")
+
+    def set_up(self):
+        """
+        Run before each test case.
+        """
+        pass
+
+    def test_individual_coremask(self):
+        """
+        Check coremask parsing for all the available cores one by one.
+        """
+
+        for core in self.all_cores:
+
+            core_mask = dts.create_mask([core])
+
+            command = command_line % (self.target, core_mask,
+                                      self.mem_channel)
+
+            out = self.dut.send_expect(command, "RTE>>", 10)
+
+            self.verify("EAL: Detected lcore %d as core" % core in out,
+                        "Core %d not detected" % core)
+
+            self.verify("EAL: Master lcore %d is ready" % core in out,
+                        "Core %d not ready" % core)
+
+            self.dut.send_expect("quit", "# ", 10)
+
+    def test_all_cores_coremask(self):
+        """
+        Check coremask parsing for all the cores at once.
+        """
+
+        core_mask = dts.create_mask(self.all_cores)
+
+        command = command_line % (self.target, core_mask, self.mem_channel)
+
+        out = self.dut.send_expect(command, "RTE>>", 10)
+
+        self.verify("EAL: Master lcore 0 is ready" in out,
+                    "Core 0 not ready")
+
+        self.verify("EAL: Detected lcore 0 as core" in out,
+                    "Core 0 not detected")
+
+        for core in self.all_cores[1:]:
+            self.verify("EAL: lcore %d is ready" % core in out,
+                        "Core %d not ready" % core)
+
+            self.verify("EAL: Detected lcore %d as core" % core in out,
+                        "Core %d not detected" % core)
+
+        self.dut.send_expect("quit", "# ", 10)
+
+    def test_big_coremask(self):
+        """
+        Check coremask parsing for more cores than available.
+        """
+
+        command_line = """./%s/app/test -c %s -n %d|tee out"""
+
+        # Default big coremask value 128
+        big_coremask_size = 128
+
+        try:
+            out = self.dut.send_expect("cat config/defconfig_%s" % self.target, "]# ", 10)
+            start_position = out.find('CONFIG_RTE_MAX_LCORE=')
+
+            if start_position > -1:
+                end_position = out.find('\n', start_position)
+                big_coremask_size = int(out[start_position + 21:end_position])
+
+                print "Detected CONFIG_RTE_MAX_LCORE=%d" % big_coremask_size
+        except:
+            print "Using default big coremask %d" % big_coremask_size
+
+        # Create a extremely big coremask
+        big_coremask = "0x"
+        for _ in range(0, big_coremask_size, 4):
+            big_coremask += "F"
+
+        command = command_line % (self.target, big_coremask, self.mem_channel)
+        try:
+            self.dut.send_expect(command, "RTE>>", 10)
+        except:
+            out = self.dut.send_expect("cat out", "# ")
+
+            self.verify("EAL: invalid coremask" in out,
+                    "Small core mask set")
+
+        self.verify("EAL: Detected lcore 0 as core" in out,
+                    "Core 0 not detected")
+
+        for core in self.all_cores[1:]:
+
+            self.verify("EAL: Detected lcore %d as core" % core in out,
+                        "Core %d not detected" % core)
+
+        self.dut.send_expect("quit", "# ", 10)
+
+    def test_wrong_coremask(self):
+        """
+        Check coremask parsing for wrong coremasks.
+        """
+
+        wrong_coremasks = ["GARBAGE", "0xJF", "0xFJF", "0xFFJ",
+                           "0xJ11", "0x1J1", "0x11J",
+                           "JF", "FJF", "FFJ",
+                           "J11", "1J1", "11J",
+                           "jf", "fjf", "ffj",
+                           "FF0x", "ff0x", "", "0x", "0"]
+
+        for coremask in wrong_coremasks:
+
+            command = command_line % (self.target, coremask, self.mem_channel)
+            try:
+                out = self.dut.send_expect(command, "# ", 5)
+                self.verify("EAL: invalid coremask" in out,
+                            "Wrong core mask (%s) accepted" % coremask)
+            except:
+                self.dut.send_expect("quit", "# ", 5)
+                raise VerifyFailure("Wrong core mask (%s) accepted" % coremask)
+
+    def tear_down(self):
+        """
+        Run after each test case.
+        """
+        self.dut.kill_all()
+
+    def tear_down_all(self):
+        """
+        Run after each test suite.
+        """
+        pass
-- 
1.7.4.4

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [dts] [PATCH] add testsuite coremask
  2015-10-22  7:26 [dts] [PATCH] add coremask test plan yongjie
@ 2015-10-22  7:26 ` yongjie
  0 siblings, 0 replies; 6+ messages in thread
From: yongjie @ 2015-10-22  7:26 UTC (permalink / raw)
  To: dts; +Cc: GuYongjie

From: GuYongjie <yongjiex.gu@intel.com>

Signed-off-by: GuYongjie <yongjiex.gu@intel.com>
---
 tests/TestSuite_coremask.py | 189 ++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 189 insertions(+)
 create mode 100644 tests/TestSuite_coremask.py

diff --git a/tests/TestSuite_coremask.py b/tests/TestSuite_coremask.py
new file mode 100644
index 0000000..3520a9c
--- /dev/null
+++ b/tests/TestSuite_coremask.py
@@ -0,0 +1,189 @@
+# <COPYRIGHT_TAG>
+
+"""
+DPDK Test suite.
+
+Test coremask parsing in DPDK.
+
+"""
+
+import dts
+
+from exception import VerifyFailure
+from test_case import TestCase
+
+#
+#
+# Test class.
+#
+
+command_line = """./%s/app/test -c %s -n %d"""
+
+
+class TestCoremask(TestCase):
+
+    #
+    #
+    #
+    # Test cases.
+    #
+
+    def set_up_all(self):
+        """
+        Run at the start of each test suite.
+
+        Coremask Prerequisites.
+        """
+
+        self.port_mask = dts.create_mask(self.dut.get_ports(self.nic))
+        self.mem_channel = self.dut.get_memory_channels()
+
+        self.all_cores = self.dut.get_core_list("all")
+
+    def set_up(self):
+        """
+        Run before each test case.
+        """
+        pass
+
+    def test_individual_coremask(self):
+        """
+        Check coremask parsing for all the available cores one by one.
+        """
+
+        for core in self.all_cores:
+
+            core_mask = dts.create_mask([core])
+
+            command = command_line % (self.target, core_mask,
+                                      self.mem_channel)
+
+            out = self.dut.send_expect(command, "RTE>>", 10)
+
+            #self.verify("EAL: coremask after trimmed is %s" % core_mask[2:] in out,
+            #            "Wrong core mask set")
+
+            self.verify("EAL: Detected lcore %d as core" % core in out,
+                        "Core %d not detected" % core)
+
+            self.verify("EAL: Master lcore %d is ready" % core in out,
+                        "Core %d not ready" % core)
+
+            self.dut.send_expect("quit", "# ", 10)
+
+    def test_all_cores_coremask(self):
+        """
+        Check coremask parsing for all the cores at once.
+        """
+
+        core_mask = dts.create_mask(self.all_cores)
+
+        command = command_line % (self.target, core_mask, self.mem_channel)
+
+        out = self.dut.send_expect(command, "RTE>>", 10)
+        #self.verify("EAL: coremask after trimmed is %s" % core_mask[2:] in out,
+        #             "Wrong core mask set")
+
+        self.verify("EAL: Master lcore 0 is ready" in out,
+                    "Core 0 not ready")
+
+        self.verify("EAL: Detected lcore 0 as core" in out,
+                    "Core 0 not detected")
+
+        for core in self.all_cores[1:]:
+            self.verify("EAL: lcore %d is ready" % core in out,
+                        "Core %d not ready" % core)
+
+            self.verify("EAL: Detected lcore %d as core" % core in out,
+                        "Core %d not detected" % core)
+
+        self.dut.send_expect("quit", "# ", 10)
+
+    def test_big_coremask(self):
+        """
+        Check coremask parsing for more cores than available.
+        """
+
+        command_line = """./%s/app/test -c %s -n %d|tee out"""
+
+        # Default big coremask value 128
+        big_coremask_size = 128
+
+        try:
+            out = self.dut.send_expect("cat config/defconfig_%s" % self.target, "]# ", 10)
+            start_position = out.find('CONFIG_RTE_MAX_LCORE=')
+
+            if start_position > -1:
+                end_position = out.find('\n', start_position)
+                big_coremask_size = int(out[start_position + 21:end_position])
+
+                print "Detected CONFIG_RTE_MAX_LCORE=%d" % big_coremask_size
+        except:
+            print "Using default big coremask %d" % big_coremask_size
+
+        # Create a extremely big coremask
+        big_coremask = "0x"
+        for _ in range(0, big_coremask_size, 4):
+            big_coremask += "F"
+
+        command = command_line % (self.target, big_coremask, self.mem_channel)
+        try:
+            self.dut.send_expect(command, "RTE>>", 10)
+        except:
+            out = self.dut.send_expect("cat out", "# ")
+
+            self.verify("EAL: invalid coremask" in out,
+                    "Small core mask set")
+
+        #self.verify("EAL: coremask after trimmed is %s" % big_coremask[2:] in out,
+        #            "Wrong core mask set")
+
+        #self.verify("EAL: Master lcore 0 is ready" in out,
+        #            "Core 0 not ready")
+
+        self.verify("EAL: Detected lcore 0 as core" in out,
+                    "Core 0 not detected")
+
+        for core in self.all_cores[1:]:
+            #self.verify("EAL: lcore %d is ready" % core in out,
+            #            "Core %d not ready" % core)
+
+            self.verify("EAL: Detected lcore %d as core" % core in out,
+                        "Core %d not detected" % core)
+
+        self.dut.send_expect("quit", "# ", 10)
+
+    def test_wrong_coremask(self):
+        """
+        Check coremask parsing for wrong coremasks.
+        """
+
+        wrong_coremasks = ["GARBAGE", "0xJF", "0xFJF", "0xFFJ",
+                           "0xJ11", "0x1J1", "0x11J",
+                           "JF", "FJF", "FFJ",
+                           "J11", "1J1", "11J",
+                           "jf", "fjf", "ffj",
+                           "FF0x", "ff0x", "", "0x", "0"]
+
+        for coremask in wrong_coremasks:
+
+            command = command_line % (self.target, coremask, self.mem_channel)
+            try:
+                out = self.dut.send_expect(command, "# ", 5)
+                self.verify("EAL: invalid coremask" in out,
+                            "Wrong core mask (%s) accepted" % coremask)
+            except:
+                self.dut.send_expect("quit", "# ", 5)
+                raise VerifyFailure("Wrong core mask (%s) accepted" % coremask)
+
+    def tear_down(self):
+        """
+        Run after each test case.
+        """
+        self.dut.kill_all()
+
+    def tear_down_all(self):
+        """
+        Run after each test suite.
+        """
+        pass
-- 
1.8.3.1

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [dts] [PATCH] add testsuite coremask
  2015-10-14  2:09 ` [dts] [PATCH] add testsuite coremask yongjie
@ 2015-10-14  8:24   ` Qiu, Michael
  0 siblings, 0 replies; 6+ messages in thread
From: Qiu, Michael @ 2015-10-14  8:24 UTC (permalink / raw)
  To: Gu, YongjieX, dts

First I would like to know what's the purpose this case, if you could
describe it in the commit log, it would help others to understand.

On 2015/10/14 10:13, yongjie wrote:
> From: GuYongjie <yongjiex.gu@intel.com>
>
> Signed-off-by: GuYongjie <yongjiex.gu@intel.com>
> ---
>  tests/TestSuite_coremask.py | 189 ++++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 189 insertions(+)
>  create mode 100644 tests/TestSuite_coremask.py
>
> diff --git a/tests/TestSuite_coremask.py b/tests/TestSuite_coremask.py
> new file mode 100644
> index 0000000..3520a9c
> --- /dev/null
> +++ b/tests/TestSuite_coremask.py
> @@ -0,0 +1,189 @@
> +# <COPYRIGHT_TAG>
> +
> +"""
> +DPDK Test suite.
> +
> +Test coremask parsing in DPDK.
> +

[.../...]

> +    def test_wrong_coremask(self):
> +        """
> +        Check coremask parsing for wrong coremasks.
> +        """
> +
> +        wrong_coremasks = ["GARBAGE", "0xJF", "0xFJF", "0xFFJ",
> +                           "0xJ11", "0x1J1", "0x11J",
> +                           "JF", "FJF", "FFJ",
> +                           "J11", "1J1", "11J",
> +                           "jf", "fjf", "ffj",
> +                           "FF0x", "ff0x", "", "0x", "0"]
> +

Here I think, the value contains "J" or other none [a~f] should be only
one entry, other wrong value could be the mask which greater the cpu
number,

Thanks,
Michael
> +        for coremask in wrong_coremasks:
> +
> +            command = command_line % (self.target, coremask, self.mem_channel)
> +            try:
> +                out = self.dut.send_expect(command, "# ", 5)
> +                self.verify("EAL: invalid coremask" in out,
> +                            "Wrong core mask (%s) accepted" % coremask)
> +            except:
> +                self.dut.send_expect("quit", "# ", 5)
> +                raise VerifyFailure("Wrong core mask (%s) accepted" % coremask)
> +
> +    def tear_down(self):
> +        """
> +        Run after each test case.
> +        """
> +        self.dut.kill_all()
> +
> +    def tear_down_all(self):
> +        """
> +        Run after each test suite.
> +        """
> +        pass


^ permalink raw reply	[flat|nested] 6+ messages in thread

* [dts] [PATCH] add testsuite coremask
  2015-10-14  2:09 [dts] [PATCH] add coremask test plan yongjie
@ 2015-10-14  2:09 ` yongjie
  2015-10-14  8:24   ` Qiu, Michael
  0 siblings, 1 reply; 6+ messages in thread
From: yongjie @ 2015-10-14  2:09 UTC (permalink / raw)
  To: dts; +Cc: GuYongjie

From: GuYongjie <yongjiex.gu@intel.com>

Signed-off-by: GuYongjie <yongjiex.gu@intel.com>
---
 tests/TestSuite_coremask.py | 189 ++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 189 insertions(+)
 create mode 100644 tests/TestSuite_coremask.py

diff --git a/tests/TestSuite_coremask.py b/tests/TestSuite_coremask.py
new file mode 100644
index 0000000..3520a9c
--- /dev/null
+++ b/tests/TestSuite_coremask.py
@@ -0,0 +1,189 @@
+# <COPYRIGHT_TAG>
+
+"""
+DPDK Test suite.
+
+Test coremask parsing in DPDK.
+
+"""
+
+import dts
+
+from exception import VerifyFailure
+from test_case import TestCase
+
+#
+#
+# Test class.
+#
+
+command_line = """./%s/app/test -c %s -n %d"""
+
+
+class TestCoremask(TestCase):
+
+    #
+    #
+    #
+    # Test cases.
+    #
+
+    def set_up_all(self):
+        """
+        Run at the start of each test suite.
+
+        Coremask Prerequisites.
+        """
+
+        self.port_mask = dts.create_mask(self.dut.get_ports(self.nic))
+        self.mem_channel = self.dut.get_memory_channels()
+
+        self.all_cores = self.dut.get_core_list("all")
+
+    def set_up(self):
+        """
+        Run before each test case.
+        """
+        pass
+
+    def test_individual_coremask(self):
+        """
+        Check coremask parsing for all the available cores one by one.
+        """
+
+        for core in self.all_cores:
+
+            core_mask = dts.create_mask([core])
+
+            command = command_line % (self.target, core_mask,
+                                      self.mem_channel)
+
+            out = self.dut.send_expect(command, "RTE>>", 10)
+
+            #self.verify("EAL: coremask after trimmed is %s" % core_mask[2:] in out,
+            #            "Wrong core mask set")
+
+            self.verify("EAL: Detected lcore %d as core" % core in out,
+                        "Core %d not detected" % core)
+
+            self.verify("EAL: Master lcore %d is ready" % core in out,
+                        "Core %d not ready" % core)
+
+            self.dut.send_expect("quit", "# ", 10)
+
+    def test_all_cores_coremask(self):
+        """
+        Check coremask parsing for all the cores at once.
+        """
+
+        core_mask = dts.create_mask(self.all_cores)
+
+        command = command_line % (self.target, core_mask, self.mem_channel)
+
+        out = self.dut.send_expect(command, "RTE>>", 10)
+        #self.verify("EAL: coremask after trimmed is %s" % core_mask[2:] in out,
+        #             "Wrong core mask set")
+
+        self.verify("EAL: Master lcore 0 is ready" in out,
+                    "Core 0 not ready")
+
+        self.verify("EAL: Detected lcore 0 as core" in out,
+                    "Core 0 not detected")
+
+        for core in self.all_cores[1:]:
+            self.verify("EAL: lcore %d is ready" % core in out,
+                        "Core %d not ready" % core)
+
+            self.verify("EAL: Detected lcore %d as core" % core in out,
+                        "Core %d not detected" % core)
+
+        self.dut.send_expect("quit", "# ", 10)
+
+    def test_big_coremask(self):
+        """
+        Check coremask parsing for more cores than available.
+        """
+
+        command_line = """./%s/app/test -c %s -n %d|tee out"""
+
+        # Default big coremask value 128
+        big_coremask_size = 128
+
+        try:
+            out = self.dut.send_expect("cat config/defconfig_%s" % self.target, "]# ", 10)
+            start_position = out.find('CONFIG_RTE_MAX_LCORE=')
+
+            if start_position > -1:
+                end_position = out.find('\n', start_position)
+                big_coremask_size = int(out[start_position + 21:end_position])
+
+                print "Detected CONFIG_RTE_MAX_LCORE=%d" % big_coremask_size
+        except:
+            print "Using default big coremask %d" % big_coremask_size
+
+        # Create a extremely big coremask
+        big_coremask = "0x"
+        for _ in range(0, big_coremask_size, 4):
+            big_coremask += "F"
+
+        command = command_line % (self.target, big_coremask, self.mem_channel)
+        try:
+            self.dut.send_expect(command, "RTE>>", 10)
+        except:
+            out = self.dut.send_expect("cat out", "# ")
+
+            self.verify("EAL: invalid coremask" in out,
+                    "Small core mask set")
+
+        #self.verify("EAL: coremask after trimmed is %s" % big_coremask[2:] in out,
+        #            "Wrong core mask set")
+
+        #self.verify("EAL: Master lcore 0 is ready" in out,
+        #            "Core 0 not ready")
+
+        self.verify("EAL: Detected lcore 0 as core" in out,
+                    "Core 0 not detected")
+
+        for core in self.all_cores[1:]:
+            #self.verify("EAL: lcore %d is ready" % core in out,
+            #            "Core %d not ready" % core)
+
+            self.verify("EAL: Detected lcore %d as core" % core in out,
+                        "Core %d not detected" % core)
+
+        self.dut.send_expect("quit", "# ", 10)
+
+    def test_wrong_coremask(self):
+        """
+        Check coremask parsing for wrong coremasks.
+        """
+
+        wrong_coremasks = ["GARBAGE", "0xJF", "0xFJF", "0xFFJ",
+                           "0xJ11", "0x1J1", "0x11J",
+                           "JF", "FJF", "FFJ",
+                           "J11", "1J1", "11J",
+                           "jf", "fjf", "ffj",
+                           "FF0x", "ff0x", "", "0x", "0"]
+
+        for coremask in wrong_coremasks:
+
+            command = command_line % (self.target, coremask, self.mem_channel)
+            try:
+                out = self.dut.send_expect(command, "# ", 5)
+                self.verify("EAL: invalid coremask" in out,
+                            "Wrong core mask (%s) accepted" % coremask)
+            except:
+                self.dut.send_expect("quit", "# ", 5)
+                raise VerifyFailure("Wrong core mask (%s) accepted" % coremask)
+
+    def tear_down(self):
+        """
+        Run after each test case.
+        """
+        self.dut.kill_all()
+
+    def tear_down_all(self):
+        """
+        Run after each test suite.
+        """
+        pass
-- 
1.8.3.1

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2015-10-23  1:01 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-10-22  8:22 [dts] [PATCH] add testsuite coremask yongjie
2015-10-23  1:03 ` Liu, Yong
  -- strict thread matches above, loose matches on Subject: below --
2015-10-22  7:31 yongjie
2015-10-22  7:26 [dts] [PATCH] add coremask test plan yongjie
2015-10-22  7:26 ` [dts] [PATCH] add testsuite coremask yongjie
2015-10-14  2:09 [dts] [PATCH] add coremask test plan yongjie
2015-10-14  2:09 ` [dts] [PATCH] add testsuite coremask yongjie
2015-10-14  8:24   ` Qiu, Michael

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