From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id 48752AD94 for ; Wed, 4 Feb 2015 05:51:41 +0100 (CET) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga103.jf.intel.com with ESMTP; 03 Feb 2015 20:47:00 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.09,517,1418112000"; d="scan'208";a="661203541" Received: from pgsmsx102.gar.corp.intel.com ([10.221.44.80]) by fmsmga001.fm.intel.com with ESMTP; 03 Feb 2015 20:51:38 -0800 Received: from shsmsx104.ccr.corp.intel.com (10.239.4.70) by PGSMSX102.gar.corp.intel.com (10.221.44.80) with Microsoft SMTP Server (TLS) id 14.3.195.1; Wed, 4 Feb 2015 12:51:37 +0800 Received: from shsmsx103.ccr.corp.intel.com ([169.254.4.91]) by SHSMSX104.ccr.corp.intel.com ([169.254.5.161]) with mapi id 14.03.0195.001; Wed, 4 Feb 2015 12:51:35 +0800 From: "Liu, Yong" To: "Qiu, Michael" , "dts@dpdk.org" Thread-Topic: [dts] [PATCH 1/4] framework: add new module for load port configuration file Thread-Index: AQHQNuZ1NfhCfdLbQUag8wYMPhg5Hpzf+C0g Date: Wed, 4 Feb 2015 04:51:36 +0000 Message-ID: <86228AFD5BCD8E4EBFD2B90117B5E81E10D6A416@SHSMSX103.ccr.corp.intel.com> References: <1422001619-27112-1-git-send-email-yong.liu@intel.com> <1422001619-27112-2-git-send-email-yong.liu@intel.com> <533710CFB86FA344BFBF2D6802E60286CD42E1@SHSMSX101.ccr.corp.intel.com> In-Reply-To: <533710CFB86FA344BFBF2D6802E60286CD42E1@SHSMSX101.ccr.corp.intel.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dts] [PATCH 1/4] framework: add new module for load port configuration file X-BeenThere: dts@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: test suite reviews and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 04 Feb 2015 04:51:41 -0000 These codes were just sample code for config module and their purpose is ju= st to show how to use this module. > -----Original Message----- > From: Qiu, Michael > Sent: Wednesday, February 04, 2015 11:26 AM > To: Liu, Yong; dts@dpdk.org > Subject: Re: [dts] [PATCH 1/4] framework: add new module for load port > configuration file >=20 > On 1/23/2015 4:27 PM, Marvin Liu wrote: > > From: Yong Liu > > > > Config module will load port configuration and parse port parameter. > > Port configuration will be used in the process of setting up DUT. > > User can assign port mac, numa or tester peer pci address of DUT port. > > > > Signed-off-by: Marvinliu > > --- > > conf/ports.cfg | 4 +++ > > framework/config.py | 93 > +++++++++++++++++++++++++++++++++++++++++++++++++++++ > > 2 files changed, 97 insertions(+) > > create mode 100644 conf/ports.cfg > > create mode 100755 framework/config.py > > > > diff --git a/conf/ports.cfg b/conf/ports.cfg > > new file mode 100644 > > index 0000000..85c1998 > > --- /dev/null > > +++ b/conf/ports.cfg > > @@ -0,0 +1,4 @@ > > +[10.239.128.117] > > +ports=3D > > + pci=3D86:00.0,intf=3Dp4p1; > > + pci=3D86:00.1,mac=3D90:e2:ba:39:b7:69,peer=3D05:00.1,numa=3D0 > > diff --git a/framework/config.py b/framework/config.py > > new file mode 100755 > > index 0000000..140c84b > > --- /dev/null > > +++ b/framework/config.py > > @@ -0,0 +1,93 @@ > > +# BSD LICENSE > > +# > > +# Copyright(c) 2010-2014 Intel Corporation. All rights reserved. > > +# All rights reserved. > > +# > > +# Redistribution and use in source and binary forms, with or without > > +# modification, are permitted provided that the following conditions > > +# are met: > > +# > > +# * Redistributions of source code must retain the above copyright > > +# notice, this list of conditions and the following disclaimer. > > +# * Redistributions in binary form must reproduce the above copyrigh= t > > +# notice, this list of conditions and the following disclaimer in > > +# the documentation and/or other materials provided with the > > +# distribution. > > +# * Neither the name of Intel Corporation nor the names of its > > +# contributors may be used to endorse or promote products derived > > +# from this software without specific prior written permission. > > +# > > +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS > > +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT > > +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FO= R > > +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT > > +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL= , > > +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT > > +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE= , > > +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON AN= Y > > +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT > > +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE US= E > > +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. > > + > > +""" > > +Generic port and crbs configuration file load function > > +""" > > + > > +import ConfigParser # config parse module > > +import argparse # prase arguments module > > + > > +portconf =3D "../conf/ports.cfg" > > +crbconf =3D "../conf/crbs.cfg" > > + > > + > > +class UserConf(): > > + > > + def __init__(self, port_conf=3Dportconf, crb_conf=3Dcrbconf): > > + self.port_config =3D port_conf > > + self.crb_config =3D crb_conf > > + self.ports_cfg =3D {} > > + try: > > + self.port_conf =3D ConfigParser.SafeConfigParser() > > + self.port_conf.read(self.port_config) > > + except Exception as e: > > + print "FAILED LOADING PORT CONFIG!!!" > > + > > + def load_ports_config(self, crbIP): > > + ports =3D [] > > + for crb in self.port_conf.sections(): > > + if crb !=3D crbIP: > > + continue > > + ports =3D [port.strip() > > + for port in self.port_conf.get(crb, > 'ports').split(';')] > > + > > + for port in ports: > > + port_cfg =3D self.parse_port_param(port) > > + if 'pci' not in port_cfg: > > + print "INVALID CONFIG FOR NO PCI ADDRESS!!!" >=20 > Would you think this port is valid for this error? >=20 > > + keys =3D port_cfg.keys() > > + keys.remove('pci') > > + self.ports_cfg[port_cfg['pci']] =3D {key: port_cfg[key] fo= r > key in keys} > > + > > + def check_port_available(self, pci_addr): > > + if pci_addr in self.ports_cfg.keys(): > > + return True > > + else: > > + return False > > + > > + def parse_port_param(self, port): > > + portDict =3D dict() > > + > > + for param in port.split(','): > > + (key, _, value) =3D param.partition('=3D') > > + portDict[key] =3D value > > + return portDict > > + > > + > > +if __name__ =3D=3D '__main__': > > + parser =3D argparse.ArgumentParser(description=3D"Load DTS > configuration files") > > + parser.add_argument("-p", "--portconf", default=3Dportconf) > > + parser.add_argument("-c", "--crbconf", default=3Dcrbconf) > > + args =3D parser.parse_args() > > + conf =3D UserConf() > > + conf.load_ports_config('10.239.128.120') > > + conf.check_port_available('0000:86:00.0') >=20 > Why here show ip and PCI address? >=20 > All those could inside cfg file, and parse it here, cfg file can be user > defined, but the script should not be changed for different config. >=20 > Thanks, > Michael