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From: "Liu, Yong" <yong.liu@intel.com>
To: "Xu, GangX" <gangx.xu@intel.com>, "dts@dpdk.org" <dts@dpdk.org>
Cc: "Xu, GangX" <gangx.xu@intel.com>
Subject: Re: [dts] [PATCH V2 02/10] add ip_pipeline cfg test plan
Date: Fri, 26 Aug 2016 01:28:10 +0000	[thread overview]
Message-ID: <86228AFD5BCD8E4EBFD2B90117B5E81E22275C0F@SHSMSX103.ccr.corp.intel.com> (raw)
In-Reply-To: <1472113463-4298-2-git-send-email-gangx.xu@intel.com>

Gang, please rewrite the description, it will help us known that what will be tested in this suite.
Please send out your suites one by one, thus we can review them more effective.

> -----Original Message-----
> From: dts [mailto:dts-bounces@dpdk.org] On Behalf Of xu,gang
> Sent: Thursday, August 25, 2016 4:24 PM
> To: dts@dpdk.org
> Cc: Xu, GangX
> Subject: [dts] [PATCH V2 02/10] add ip_pipeline cfg test plan
> 
> Signed-off-by: xu,gang <gangx.xu@intel.com>
> ---
>  test_plans/ip_pipeline_cfg_test_plan.rst | 173
> +++++++++++++++++++++++++++++++
>  1 file changed, 173 insertions(+)
>  create mode 100644 test_plans/ip_pipeline_cfg_test_plan.rst
> 
> diff --git a/test_plans/ip_pipeline_cfg_test_plan.rst
> b/test_plans/ip_pipeline_cfg_test_plan.rst
> new file mode 100644
> index 0000000..db8170e
> --- /dev/null
> +++ b/test_plans/ip_pipeline_cfg_test_plan.rst
> @@ -0,0 +1,173 @@
> +.. Copyright (c) <2010,2011>, Intel Corporation
> +      All rights reserved.
> +
> +   Redistribution and use in source and binary forms, with or without
> +   modification, are permitted provided that the following conditions
> +   are met:
> +
> +   - Redistributions of source code must retain the above copyright
> +     notice, this list of conditions and the following disclaimer.
> +
> +   - Redistributions in binary form must reproduce the above copyright
> +     notice, this list of conditions and the following disclaimer in
> +     the documentation and/or other materials provided with the
> +     distribution.
> +
> +   - Neither the name of Intel Corporation nor the names of its
> +     contributors may be used to endorse or promote products derived
> +     from this software without specific prior written permission.
> +
> +   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
> +   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
> +   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
> +   FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
> +   COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
> +   INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
> +   (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
> +   SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
> +   HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
> +   STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
> +   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
> +   OF THE POSSIBILITY OF SUCH DAMAGE.
> +
> +ip_pipeline cfg test plan
> +========================
> +
> +run ip_pipeline need cfg file,so this case test if ip_pipeline's cfg file
> +changed whrther the ip_pipeline program can run.
> +the cfg file as follow:
> +

Gang, your description has invalid syntax issue and also has some typo errors.
Please check about it first.

Please add some basic descriptions for below configuration files. 
Like firewall cfg will create what kind of scenario.

> +default-FIREWALL.cfg
> +=======================
> +;The default values are stored in this file
> +[PIPELINE0]
> +type = MASTER
> +core = 0
> +;PIPELINE1 all global variable
> +[PIPELINE1]
> +core = 1
> +pktq_in = RXQ0.0 RXQ1.0
> +pktq_out = TXQ0.0 TXQ1.0
> +msgq_in = MSGQ0
> +msgq_out = MSGQ0
> +timer_period = 100
> +
> +type = FIREWALL
> +n_rules = 1
> +pkt_type = ipv4
> +
> +if running successfully,test pass else fail
> +-------------------------------------------
> +
> +default-FLOW_ACTIONS.cfg
> +========================
> +;The default values are stored in this file
> +[PIPELINE0]
> +type = MASTER
> +core = 0
> +;PIPELINE1 all global variable
> +[PIPELINE1]
> +core = 1
> +pktq_in = RXQ0.0 RXQ1.0
> +pktq_out = TXQ0.0 TXQ1.0
> +msgq_in = MSGQ0
> +msgq_out = MSGQ0
> +timer_period = 100
> +
> +type = FLOW_ACTIONS
> +n_flows = 4096
> +flow_id_offset = 286
> +color_offset = 192
> +ip_hdr_offset = 270
> +n_meters_per_flow = 1
> +
> +if running successfully,test pass else fail
> +-------------------------------------------
> +
> +default-FLOW_CLASSIFICATION.cfg
> +===============================
> +;The default values are stored in this file
> +[PIPELINE0]
> +type = MASTER
> +core = 0
> +;PIPELINE1 all global variable
> +[PIPELINE1]
> +core = 1
> +pktq_in = RXQ0.0 RXQ1.0
> +pktq_out = TXQ0.0 TXQ1.0
> +msgq_in = MSGQ0
> +msgq_out = MSGQ0
> +timer_period = 100
> +
> +type = FLOW_CLASSIFICATION
> +n_flows = 4096
> +key_offset = 192
> +key_size = 16
> +hash_offset = 208
> +
> +if running successfully,test pass else fail
> +-------------------------------------------
> +
> +default-PASS-THROUGH.cfg
> +========================
> +[PIPELINE0]
> +type = MASTER
> +core = 0
> +[PIPELINE1]
> +core = 1
> +pktq_in = RXQ0.0 RXQ1.0
> +pktq_out = TXQ0.0 TXQ1.0
> +msgq_in = MSGQ0
> +msgq_out = MSGQ0
> +timer_period = 100
> +
> +type = PASS-THROUGH
> +dma_size = 16
> +dma_dst_offset = 64
> +dma_src_offset = 150
> +dma_src_mask = 00FF0000FFFFFFFFFFFFFFFFFFFFFFFF
> +dma_hash_offset = 80
> +
> +if running successfully,test pass else fail
> +-------------------------------------------
> +
> +default-ROUTING.cfg
> +===================
> +;The default values are stored in this file
> +[PIPELINE0]
> +type = MASTER
> +core = 0
> +;PIPELINE1 all global variable
> +[PIPELINE1]
> +core = 1
> +pktq_in = RXQ0.0 RXQ1.0
> +pktq_out = TXQ0.0 TXQ1.0
> +msgq_in = MSGQ0
> +msgq_out = MSGQ0
> +timer_period = 100
> +
> +type = ROUTING
> +n_routes = 4096
> +ip_hdr_offset = 270
> +
> +if running successfully,test pass else fail
> +-------------------------------------------
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> --
> 1.9.3

  reply	other threads:[~2016-08-26  1:29 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-08-25  8:24 [dts] [PATCH V2 01/10] add ip_pipeline cfg test code xu,gang
2016-08-25  8:24 ` [dts] [PATCH V2 02/10] add ip_pipeline cfg test plan xu,gang
2016-08-26  1:28   ` Liu, Yong [this message]
2016-08-25  8:24 ` [dts] [PATCH V2 03/10] add ip_pipeline cpu utilization test code xu,gang
2016-08-25  8:24 ` [dts] [PATCH V2 04/10] add ip_pipeline cpu utilization test plan xu,gang
2016-08-25  8:24 ` [dts] [PATCH V2 05/10] add ip_pipeline link_identification test code xu,gang
2016-08-25  8:24 ` [dts] [PATCH V2 06/10] add ip_pipeline link_identification test plan xu,gang
2016-08-26  2:19   ` Liu, Yong
2016-08-25  8:24 ` [dts] [dst][PATCH V2 07/10] add ip_pipeline parser_cleanup test code xu,gang
2016-08-25  8:24 ` [dts] [PATCH V2 08/10] add ip_pipeline parser_cleanup test plan xu,gang
2016-08-25  8:24 ` [dts] [PATCH V2 09/10] add ip_pipeline source_sink test code xu,gang
2016-08-25  8:24 ` [dts] [PATCH V2 10/10] add ip_pipeline source_sink test plan xu,gang

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