From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id DD4FAA00E6 for ; Tue, 16 Apr 2019 00:35:48 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 523091B438; Tue, 16 Apr 2019 00:35:48 +0200 (CEST) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by dpdk.org (Postfix) with ESMTP id F32795A6E for ; Tue, 16 Apr 2019 00:35:46 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 15 Apr 2019 15:35:45 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,355,1549958400"; d="scan'208";a="131664478" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by orsmga007.jf.intel.com with ESMTP; 15 Apr 2019 15:35:45 -0700 Received: from fmsmsx158.amr.corp.intel.com (10.18.116.75) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.408.0; Mon, 15 Apr 2019 15:35:45 -0700 Received: from shsmsx154.ccr.corp.intel.com (10.239.6.54) by fmsmsx158.amr.corp.intel.com (10.18.116.75) with Microsoft SMTP Server (TLS) id 14.3.408.0; Mon, 15 Apr 2019 15:35:45 -0700 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.164]) by SHSMSX154.ccr.corp.intel.com ([169.254.7.149]) with mapi id 14.03.0415.000; Tue, 16 Apr 2019 06:35:43 +0800 From: "Tu, Lijuan" To: David Wilder , "dts@dpdk.org" CC: "pradeep@us.ibm.com" , "wilder@us.ibm.com" Thread-Topic: [dts] [PATCH V1] tests/coremask: correct Master lcore Thread-Index: AQHU5OMjk5zUCla2Z0CtEqZ9LhMgv6Y97U4Q Date: Mon, 15 Apr 2019 22:35:42 +0000 Message-ID: <8CE3E05A3F976642AAB0F4675D0AD20E0BA626F1@SHSMSX101.ccr.corp.intel.com> References: <20190327212145.1978-1-dwilder@us.ibm.com> In-Reply-To: <20190327212145.1978-1-dwilder@us.ibm.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.0.600.7 dlp-reaction: no-action x-ctpclassification: CTP_NT x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiYjQwYjY5NDgtZDVhMC00MzFhLWExNTYtNjIxN2U5NTdkOWQ4IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoicTB6WVwvSFBjOGJTV1NTWHU0Y3RFdEJFenNuMlBabzVFNHJ6Wmgxd1h0dVwvNWpaVVg5ZEcrbGljV3lMUVNUMkdJIn0= x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dts] [PATCH V1] tests/coremask: correct Master lcore X-BeenThere: dts@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: test suite reviews and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dts-bounces@dpdk.org Sender: "dts" Applied, thanks > -----Original Message----- > From: dts [mailto:dts-bounces@dpdk.org] On Behalf Of David Wilder > Sent: Wednesday, March 27, 2019 2:22 PM > To: dts@dpdk.org > Cc: pradeep@us.ibm.com; wilder@us.ibm.com > Subject: [dts] [PATCH V1] tests/coremask: correct Master lcore >=20 > The "test_all_cores_core-mask sub-test validates that the Master lcore > becomes ready, the test assumes this to be core 1, this is not correct fo= r all > architectures or all configurations. For example this test will fail on = x86_64 > with bypass_core0=3DFalse and on Power9 with most smt configurations. Th= is > patch determines the first (lowest numbered) core from the list of availa= ble > cores and tests that that core becomes ready. >=20 > I validated this change that the test will pass on both Power9 and > x86_64 with both true and false setting of bypass_core0.o >=20 > Signed-off-by: David Wilder > --- > tests/TestSuite_coremask.py | 10 ++++++---- > 1 file changed, 6 insertions(+), 4 deletions(-) >=20 > diff --git a/tests/TestSuite_coremask.py b/tests/TestSuite_coremask.py in= dex > 921dc31..7299e0c 100644 > --- a/tests/TestSuite_coremask.py > +++ b/tests/TestSuite_coremask.py > @@ -92,14 +92,16 @@ class TestCoremask(TestCase): >=20 > core_mask =3D utils.create_mask(self.all_cores[:available_max_lc= ore - 1]) >=20 > + first_core=3Dself.all_cores[0] > + > command =3D command_line % (self.target, core_mask, > self.mem_channel) >=20 > out =3D self.dut.send_expect(command, "RTE>>", 10) > - self.verify("EAL: Master lcore 1 is ready" in out, > - "Core 1 not ready") > + self.verify("EAL: Master lcore %s is ready" % first_core in out, > + "Core %s not ready" % first_core ) >=20 > - self.verify("EAL: Detected lcore 1 as core" in out, > - "Core 1 not detected") > + self.verify("EAL: Detected lcore %s as core" % first_core in out= , > + "Core %s not detected" % first_core ) >=20 > for core in self.all_cores[1:available_max_lcore - 1]: > self.verify("EAL: lcore %s is ready" % core in out, > -- > 1.8.3.1