Re: [dts] [PATCH V2] framework/dut.py:correct the code defect.

["Tu, Lijuan" <lijuan.tu@intel.com>]

Applied, thanks

> -----Original Message-----
> From: dts [mailto:dts-bounces@dpdk.org] On Behalf Of Jianwei Mei
> Sent: Tuesday, November 5, 2019 5:27 PM
> To: dts@dpdk.org
> Cc: Mei, JianweiX <jianweix.mei@intel.com>
> Subject: [dts] [PATCH V2] framework/dut.py:correct the code defect.
> 
> code logic error and modify it.
> 
> Signed-off-by: Jianwei Mei <jianweix.mei@intel.com>
> ---
>  framework/dut.py | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/framework/dut.py b/framework/dut.py index 54ff28b..4d8874a
> 100644
> --- a/framework/dut.py
> +++ b/framework/dut.py
> @@ -120,7 +120,7 @@ class Dut(Crb):
>          if config:
>              # deal with cores
>              if config.has_key('cores'):
> -                if config['cores'] == '' or config['cores'] == 'Default':
> +                if config['cores'] == '' or config['cores'].lower() == 'default':
>                      core_list = self.get_core_list(default_cores)
>                  elif type(config['cores']) == list:
>                      core_list = config['cores'] @@ -144,7 +144,7 @@ class Dut(Crb):
>                              port_option = config['port_options'][port]
>                              w_pci_list.append('-w %s,%s' %
> (self.ports_info[config['ports'].index(port)]['pci'], port_option))
>                          else:
> -                            w_pci_list = ['-w %s' % pci for pci in config['ports']]
> +                            w_pci_list.append('-w %s' %
> + self.ports_info[config['ports'].index(port)]['pci'])
>              w_pci_str = ' '.join(w_pci_list)
> 
>              # deal with black ports
> --
> 1.8.3.1