* Re: [dts] [PATCH V1] tests/cvl_switch_filter: hard code will have problems on 4 ports.
2020-09-01 10:33 [dts] [PATCH V1] tests/cvl_switch_filter: hard code will have problems on 4 ports Jianwei Mei
@ 2020-09-01 7:45 ` Lu, Nannan
2020-09-02 4:41 ` Tu, Lijuan
1 sibling, 0 replies; 3+ messages in thread
From: Lu, Nannan @ 2020-09-01 7:45 UTC (permalink / raw)
To: Mei, JianweiX, dts; +Cc: Mei, JianweiX
> -----Original Message-----
> From: dts <dts-bounces@dpdk.org> On Behalf Of Jianwei Mei
> Sent: Tuesday, September 1, 2020 6:34 PM
> To: dts@dpdk.org
> Cc: Mei, JianweiX <jianweix.mei@intel.com>
> Subject: [dts] [PATCH V1] tests/cvl_switch_filter: hard code will have problems
> on 4 ports.
>
> Hard code has porblems on NIC 4 ports.
>
> Signed-off-by: Jianwei Mei <jianweix.mei@intel.com>
> ---
> tests/TestSuite_cvl_switch_filter.py | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
Acked-by: Nannan Lu <nannan.lu@intel.com>
> --
> 2.17.1
^ permalink raw reply [flat|nested] 3+ messages in thread
* [dts] [PATCH V1] tests/cvl_switch_filter: hard code will have problems on 4 ports.
@ 2020-09-01 10:33 Jianwei Mei
2020-09-01 7:45 ` Lu, Nannan
2020-09-02 4:41 ` Tu, Lijuan
0 siblings, 2 replies; 3+ messages in thread
From: Jianwei Mei @ 2020-09-01 10:33 UTC (permalink / raw)
To: dts; +Cc: Jianwei Mei
Hard code has porblems on NIC 4 ports.
Signed-off-by: Jianwei Mei <jianweix.mei@intel.com>
---
tests/TestSuite_cvl_switch_filter.py | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/tests/TestSuite_cvl_switch_filter.py b/tests/TestSuite_cvl_switch_filter.py
index 339dae6..a4509b3 100644
--- a/tests/TestSuite_cvl_switch_filter.py
+++ b/tests/TestSuite_cvl_switch_filter.py
@@ -4546,18 +4546,18 @@ class CVLSwitchFilterTest(TestCase):
"""
generate file with fdir rules to make fdir table full, then test switch filter
"""
- fdir_rule_number = 14336 + int(2048/(len(self.dut_ports)))
+ self.fdir_rule_number = 14336 + int(2048/(len(self.dut_ports)))
src_file = 'dep/testpmd_cmds_rte_flow_fdir_rules'
flows = open(src_file, mode='w')
rule_count = 1
for i in range(0,255):
for j in range(0,255):
- if not rule_count > fdir_rule_number:
+ if not rule_count > self.fdir_rule_number:
flows.write('flow create 0 ingress pattern eth / ipv4 src is 192.168.%d.%d dst is 192.1.0.0 tos is 4 / tcp src is 25 dst is 23 / end actions queue index 5 / end \n' % (i, j))
rule_count += 1
else:
break
- if rule_count > fdir_rule_number:
+ if rule_count > self.fdir_rule_number:
break
flows.close()
self.dut_file_dir = '/tmp'
@@ -4749,7 +4749,7 @@ class CVLSwitchFilterTest(TestCase):
result = [i.group(1) for i in res]
if is_non_pipeline:
#remove 15360 fdir rules id
- del result[:15360]
+ del result[:self.fdir_rule_number]
if is_need_rss_rule:
#remove rss rule id
del result[0]
--
2.17.1
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [dts] [PATCH V1] tests/cvl_switch_filter: hard code will have problems on 4 ports.
2020-09-01 10:33 [dts] [PATCH V1] tests/cvl_switch_filter: hard code will have problems on 4 ports Jianwei Mei
2020-09-01 7:45 ` Lu, Nannan
@ 2020-09-02 4:41 ` Tu, Lijuan
1 sibling, 0 replies; 3+ messages in thread
From: Tu, Lijuan @ 2020-09-02 4:41 UTC (permalink / raw)
To: Mei, JianweiX, dts; +Cc: Mei, JianweiX
> Subject: [dts] [PATCH V1] tests/cvl_switch_filter: hard code will have problems
> on 4 ports.
>
> Hard code has porblems on NIC 4 ports.
>
> Signed-off-by: Jianwei Mei <jianweix.mei@intel.com>
Applied
^ permalink raw reply [flat|nested] 3+ messages in thread
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2020-09-01 7:45 ` Lu, Nannan
2020-09-02 4:41 ` Tu, Lijuan
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