From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id EF33CA00E6 for ; Mon, 15 Apr 2019 20:17:00 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id A16421B3BC; Mon, 15 Apr 2019 20:17:00 +0200 (CEST) Received: from EUR03-AM5-obe.outbound.protection.outlook.com (mail-eopbgr30080.outbound.protection.outlook.com [40.107.3.80]) by dpdk.org (Postfix) with ESMTP id 969E91B3BC; Mon, 15 Apr 2019 20:16:58 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Mellanox.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=eVvDNGiFpeBgKQQ4twP3pAlMYDMIPtv7NhEMB71ijAQ=; b=G+W8+Lzg3rttw5F4HZbtBDF/XqtP1N4SCvY9h+Xu1m5poC8JuSfKAUJWqiJWNg5KEvu/5LS+eMSLB2lgHOrBYLurEi0lJVgRQpU0dGhrSb4YjxZs+iOvpBb9KPz49lyn+aA5URVOHZmzrxF3XO1+VksQEbg6o7x2gjbGBG/VzPg= Received: from DB3PR0502MB3980.eurprd05.prod.outlook.com (52.134.72.27) by DB3PR0502MB3961.eurprd05.prod.outlook.com (52.134.70.142) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1792.18; 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DIR:OUT; SFP:1101; SCL:1; SRVR:DB3PR0502MB3961; H:DB3PR0502MB3980.eurprd05.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: mellanox.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: zIo7tC+xGPbaynNLv2+QpQLRtT8ZII4ZYjez6xNQm3VSYnWrPCYEQ+0q3RzJvS/UZ9bxIfiz9UxZU8aemxOSQ8gQJDhB7B+Cq5KrTqqZ+objs44igr6CqyNWIPJ1pLO/GwGGpYi+wOKhMXDZjg9zil3y8tn98XkbtUxnMr0pw+YJCC/k6ZelhdttDSWmn6un6x7a0QQYtaeCAfhqxZsGcHmUNxFWAYNT3aI5YYEcWuGvOGK7P2WxpyVDq6L0zoIjZ/R52GFv3SJ2/HSVok1597E6JG2IvQL/yRYhSa4cv7Ekxx3PRSAV2VS8CF6VtmfVovLCHs1IwBDj6FN4Nn257iDogfn8EjNcgCVbD1H7usGZHnXKG3Gk2YIQQgL66YQnp0undsgGdoWRPn/UNZX9iNSDxeGbvqK8v4MVsozKpwQ= Content-Type: text/plain; charset="us-ascii" Content-ID: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Mellanox.com X-MS-Exchange-CrossTenant-Network-Message-Id: 594da8b0-a44f-421b-4fb5-08d6c1ce8b9a X-MS-Exchange-CrossTenant-originalarrivaltime: 15 Apr 2019 18:16:56.7852 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: a652971c-7d2e-4d9b-a6a4-d149256f461b X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB3PR0502MB3961 Subject: Re: [dpdk-stable] [EXT] [PATCH 1/6] meson: disable octeontx for buggy compilers on arm64 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" > On Apr 12, 2019, at 10:52 PM, Pavan Nikhilesh Bhagavatula wrote: >=20 > Hi Yongseok, >=20 >> ---------------------------------------------------------------------- >> Disable octeontx for gcc 4.8.5 as compiler is emitting "internal compile= r error" >> for aarch64 >>=20 >> Fixes: bd77f2d64c44 ("event/octeontx: build with meson") >> Fixes: 4f760550a093 ("mk: disable OcteonTx for buggy compilers") >> Fixes: f3af3e44a444 ("mk: disable OcteonTx for buggy compilers only on >> arm64") >> Cc: pbhagavatula@marvell.com >> Cc: jerinj@marvell.com >> Cc: stable@dpdk.org >>=20 >> Signed-off-by: Yongseok Koh >> --- >> drivers/event/meson.build | 6 +++++- >> 1 file changed, 5 insertions(+), 1 deletion(-) >>=20 >> diff --git a/drivers/event/meson.build b/drivers/event/meson.build index >> 836ecbb74b..d364871d15 100644 >> --- a/drivers/event/meson.build >> +++ b/drivers/event/meson.build >> @@ -1,7 +1,11 @@ >> # SPDX-License-Identifier: BSD-3-Clause # Copyright(c) 2017 Intel Corpo= ration >>=20 >> -drivers =3D ['dpaa', 'dpaa2', 'octeontx', 'opdl', 'skeleton', 'sw', 'ds= w'] >> +drivers =3D ['dpaa', 'dpaa2', 'opdl', 'skeleton', 'sw', 'dsw'] if >> +(toolchain =3D=3D 'gcc' and cc.version().version_compare('>=3D4.8.6') a= nd >> + dpdk_conf.has('RTE_ARCH_ARM64')) >=20 > Can we make this similar to MAKEFILE[1] case where octeontx is enabled fo= r everycase except when=20 > We are compiling for ARCH_ARM64 is set and compiler is less than < 4.8.6?= . > The reason being we want x86 CI to run (compilation part) to find any err= ors. >=20 > [1] > ' > ifeq ($(CONFIG_RTE_ARCH), arm64) > ifeq ($(shell test $(GCC_VERSION)$(GCC_PATCHLEVEL) -lt 486 && echo= 1), 1) > CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF=3Dd > CONFIG_RTE_LIBRTE_OCTEONTX_MEMPOOL=3Dd > CONFIG_RTE_LIBRTE_OCTEONTX_PMD=3Dd > endif > endif > ' OMG, I was very wrong about the patch. That was Friday and I was moving fas= t. :-) Will fix it in v2. thanks, Yongseok >=20 >> + drivers +=3D 'octeontx' >> +endif >> std_deps =3D ['eventdev', 'kvargs'] >> config_flag_fmt =3D 'RTE_LIBRTE_@0@_EVENTDEV_PMD' >> driver_name_fmt =3D 'rte_pmd_@0@_event' >> -- >> 2.21.0.196.g041f5ea