From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id B42B0A0679 for ; Tue, 2 Apr 2019 04:49:27 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 82AD054AE; Tue, 2 Apr 2019 04:49:27 +0200 (CEST) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by dpdk.org (Postfix) with ESMTP id 4C1A24F93; Tue, 2 Apr 2019 04:49:23 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 01 Apr 2019 19:49:22 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,298,1549958400"; d="scan'208";a="147211266" Received: from fmsmsx104.amr.corp.intel.com ([10.18.124.202]) by orsmga002.jf.intel.com with ESMTP; 01 Apr 2019 19:49:22 -0700 Received: from fmsmsx114.amr.corp.intel.com (10.18.116.8) by fmsmsx104.amr.corp.intel.com (10.18.124.202) with Microsoft SMTP Server (TLS) id 14.3.408.0; Mon, 1 Apr 2019 19:49:21 -0700 Received: from shsmsx104.ccr.corp.intel.com (10.239.4.70) by FMSMSX114.amr.corp.intel.com (10.18.116.8) with Microsoft SMTP Server (TLS) id 14.3.408.0; Mon, 1 Apr 2019 19:49:21 -0700 Received: from shsmsx103.ccr.corp.intel.com ([169.254.4.93]) by SHSMSX104.ccr.corp.intel.com ([169.254.5.92]) with mapi id 14.03.0415.000; Tue, 2 Apr 2019 10:49:19 +0800 From: "Zhang, Qi Z" To: "Zhang, Qi Z" , "Zhao1, Wei" , "dev@dpdk.org" CC: "stable@dpdk.org" Thread-Topic: [dpdk-dev] [PATCH v4] net/iavf: fix Tx interrupt vertor configuration error Thread-Index: AQHU46J775EMiy9A4EWNN2pTj7OTkaYoNVgQ Date: Tue, 2 Apr 2019 02:49:19 +0000 Message-ID: <039ED4275CED7440929022BC67E70611533614C4@SHSMSX103.ccr.corp.intel.com> References: <1553568050-13343-1-git-send-email-wei.zhao1@intel.com> <1553576879-8824-1-git-send-email-wei.zhao1@intel.com> <039ED4275CED7440929022BC67E7061153353827@SHSMSX103.ccr.corp.intel.com> In-Reply-To: <039ED4275CED7440929022BC67E7061153353827@SHSMSX103.ccr.corp.intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiZDQ2NjRkMGMtM2VmNi00ZTYxLWFlZWYtNmYwNzM4MzY0MjQ4IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiUlwvRTl2RWhpbUZ6RFBYeHZQdDFUTjZOTkxtWXg5YVR4Z1JEbzdHckxxSVJRVFdhdXNjRjBtc1dlRml6OG9QaDcifQ== x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.400.15 dlp-reaction: no-action x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-stable] [dpdk-dev] [PATCH v4] net/iavf: fix Tx interrupt vertor configuration error X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" > -----Original Message----- > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Zhang, Qi Z > Sent: Tuesday, March 26, 2019 3:03 PM > To: Zhao1, Wei ; dev@dpdk.org > Cc: stable@dpdk.org > Subject: Re: [dpdk-dev] [PATCH v4] net/iavf: fix Tx interrupt vertor conf= iguration > error >=20 >=20 >=20 > > -----Original Message----- > > From: Zhao1, Wei > > Sent: Tuesday, March 26, 2019 1:08 PM > > To: dev@dpdk.org > > Cc: stable@dpdk.org; Zhang, Qi Z ; Zhao1, Wei > > > > Subject: [PATCH v4] net/iavf: fix Tx interrupt vertor configuration > > error > > > > There is need to align to kernel iavf code when setting Tx queue > > interrupt vector in messge VIRTCHNL_OP_CONFIG_IRQ_MAP, if not it maybe > > cause restart iavf port error in some scenario. >=20 > Actually , we are not aligned with kernel iavf's implementation which ass= ume rxq > =3D txq >=20 > Reword the commit log as below: >=20 > According to latest AVF virtual channel spec, interrupt vector is > required to be configured for each Tx queue. > The patch implemented the mechanism by assign interrupt vector to > each Tx queue with round robin (same method for Rx queue). > This also fixed the unexpected Tx queue config error when hosted by > ice kernel driver. >=20 > > > > Fixes: 69dd4c3d0898 ("net/avf: enable queue and device") > > Cc: stable@dpdk.org > > > > Signed-off-by: Wei Zhao > > >=20 > Acked-by: Qi Zhang >=20 > Applied to dpdk-next-net-intel with above change. The patch is dropped due to the limitation is removed from virtual channel,= no need to worry about Tx interrupt vector in vf side. >=20 > Thanks > Qi >=20 > > --- > > > > v2: > > update git log and add new work around > > > > v3: > > update git comment and change fix code as suggestion > > > > v4: > > add txq_map in struct avf_info to keep vector mapping info > > --- > > drivers/net/iavf/iavf.h | 1 + > > drivers/net/iavf/iavf_ethdev.c | 9 +++++++++ > > drivers/net/iavf/iavf_vchnl.c > > | 2 +- > > 3 files changed, 11 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/net/iavf/iavf.h b/drivers/net/iavf/iavf.h index > > e6e3e8d..81d0054 100644 > > --- a/drivers/net/iavf/iavf.h > > +++ b/drivers/net/iavf/iavf.h > > @@ -107,6 +107,7 @@ struct iavf_info { > > uint16_t msix_base; /* msix vector base from */ > > /* queue bitmask for each vector */ > > uint16_t rxq_map[IAVF_MAX_MSIX_VECTORS]; > > + uint16_t txq_map[IAVF_MAX_MSIX_VECTORS]; > > }; > > > > #define IAVF_MAX_PKT_TYPE 256 > > diff --git a/drivers/net/iavf/iavf_ethdev.c > > b/drivers/net/iavf/iavf_ethdev.c index 846e604..187a31c 100644 > > --- a/drivers/net/iavf/iavf_ethdev.c > > +++ b/drivers/net/iavf/iavf_ethdev.c > > @@ -336,6 +336,8 @@ static int iavf_config_rx_queues_irqs(struct > > rte_eth_dev *dev, > > /* map all queues to the same interrupt */ > > for (i =3D 0; i < dev->data->nb_rx_queues; i++) > > vf->rxq_map[vf->msix_base] |=3D 1 << i; > > + for (i =3D 0; i < dev->data->nb_tx_queues; i++) > > + vf->txq_map[vf->msix_base] |=3D 1 << i; > > } else { > > if (!rte_intr_allow_others(intr_handle)) { > > vf->nb_msix =3D 1; > > @@ -344,6 +346,8 @@ static int iavf_config_rx_queues_irqs(struct > > rte_eth_dev *dev, > > vf->rxq_map[vf->msix_base] |=3D 1 << i; > > intr_handle->intr_vec[i] =3D IAVF_MISC_VEC_ID; > > } > > + for (i =3D 0; i < dev->data->nb_tx_queues; i++) > > + vf->txq_map[vf->msix_base] |=3D 1 << i; > > PMD_DRV_LOG(DEBUG, > > "vector %u are mapping to all Rx queues", > > vf->msix_base); > > @@ -361,6 +365,11 @@ static int iavf_config_rx_queues_irqs(struct > > rte_eth_dev *dev, > > if (vec >=3D vf->nb_msix) > > vec =3D IAVF_RX_VEC_START; > > } > > + for (i =3D 0; i < dev->data->nb_tx_queues; i++) { > > + vf->txq_map[vec++] |=3D 1 << i; > > + if (vec >=3D vf->nb_msix) > > + vec =3D IAVF_RX_VEC_START; > > + } > > PMD_DRV_LOG(DEBUG, > > "%u vectors are mapping to %u Rx queues", > > vf->nb_msix, dev->data->nb_rx_queues); diff --git > > a/drivers/net/iavf/iavf_vchnl.c b/drivers/net/iavf/iavf_vchnl.c index > > 6381fb6..620e011 100644 > > --- a/drivers/net/iavf/iavf_vchnl.c > > +++ b/drivers/net/iavf/iavf_vchnl.c > > @@ -614,7 +614,7 @@ iavf_config_irq_map(struct iavf_adapter *adapter) > > vecmap->vsi_id =3D vf->vsi_res->vsi_id; > > vecmap->rxitr_idx =3D IAVF_ITR_INDEX_DEFAULT; > > vecmap->vector_id =3D vf->msix_base + i; > > - vecmap->txq_map =3D 0; > > + vecmap->txq_map =3D vf->txq_map[vf->msix_base + i]; > > vecmap->rxq_map =3D vf->rxq_map[vf->msix_base + i]; > > } > > > > -- > > 2.7.5