From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id B479AA04B5 for ; Fri, 6 Nov 2020 17:58:09 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id AC2B42BD3; Fri, 6 Nov 2020 17:58:08 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 13D472BD3 for ; Fri, 6 Nov 2020 17:58:07 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from viacheslavo@nvidia.com) with SMTP; 6 Nov 2020 18:58:05 +0200 Received: from nvidia.com (pegasus12.mtr.labs.mlnx [10.210.17.40]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0A6Gw5wi016638; Fri, 6 Nov 2020 18:58:05 +0200 From: Viacheslav Ovsiienko To: dev@dpdk.org Cc: rasland@nvidia.com, akozyrev@nvidia.com, matan@nvidia.com, stable@dpdk.org Date: Fri, 6 Nov 2020 16:58:03 +0000 Message-Id: <1604681883-30902-1-git-send-email-viacheslavo@nvidia.com> X-Mailer: git-send-email 1.8.3.1 Subject: [dpdk-stable] [PATCH] net/mlx5: fix Tx queue completions on stop X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" The Tx queue completion production index was not reset on Tx queue stop and there were completions remaining from the previous queue run. This caused the wrong completion queue operating and overall Tx queue malfunction on queue restart. Fixes: 161d103b231c ("net/mlx5: add queue start and stop") Cc: stable@dpdk.org Signed-off-by: Viacheslav Ovsiienko --- drivers/net/mlx5/mlx5_txq.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c index faf4e45..d96abef 100644 --- a/drivers/net/mlx5/mlx5_txq.c +++ b/drivers/net/mlx5/mlx5_txq.c @@ -154,6 +154,7 @@ /* Resync CQE and WQE (WQ in reset state). */ rte_io_wmb(); *txq->cq_db = rte_cpu_to_be_32(txq->cq_ci); + txq->cq_pi = txq->cq_ci; rte_io_wmb(); } -- 1.8.3.1