From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id CE69BA0547 for ; Mon, 8 Feb 2021 04:04:13 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8180B40147; Mon, 8 Feb 2021 04:04:13 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by mails.dpdk.org (Postfix) with ESMTP id 7CA3540693 for ; Mon, 8 Feb 2021 04:04:12 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from suanmingm@nvidia.com) with SMTP; 8 Feb 2021 05:04:09 +0200 Received: from nvidia.com (mtbc-r640-04.mtbc.labs.mlnx [10.75.70.9]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 11834526016774; Mon, 8 Feb 2021 05:04:08 +0200 From: Suanming Mou To: christian.ehrhardt@canonical.com Cc: viacheslavo@nvidia.com, stable@dpdk.org Date: Mon, 8 Feb 2021 11:04:01 +0800 Message-Id: <1612753441-328529-3-git-send-email-suanmingm@nvidia.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1612753441-328529-1-git-send-email-suanmingm@nvidia.com> References: <1612753441-328529-1-git-send-email-suanmingm@nvidia.com> Subject: [dpdk-stable] [PATCH 19.11 2/2] net/mlx5: fix port attach in secondary process X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" [ upstream commit 2b36c30b8cd87585502dec0d2b89e76193f13fc3 ] Currently, the secondary process port UAR register mapping used by Tx queue is done during port initializing. Unluckily, in port hot-plug case, the secondary process was requested to initialize the port when primary process did not complete the device configuration and the port Tx queue number is not configured yet. Hence, the secondary process gets the zero Tx queue number during probing, causing the UAR registers not be mapped in the correct fashion. This commit checks the configured number of Tx queues in secondary process when the port start is requested. In case the Tx queue number mismatch found the UAR mapping is reinitialized accordingly. Fixes: 2aac5b5d119f ("net/mlx5: sync stop/start with secondary process") Cc: stable@dpdk.org Signed-off-by: Suanming Mou Acked-by: Viacheslav Ovsiienko --- drivers/net/mlx5/mlx5.c | 2 +- drivers/net/mlx5/mlx5.h | 6 +++++- drivers/net/mlx5/mlx5_mp.c | 22 ++++++++++++++++++++++ 3 files changed, 28 insertions(+), 2 deletions(-) diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c index ac47452..f8de9e3 100644 --- a/drivers/net/mlx5/mlx5.c +++ b/drivers/net/mlx5/mlx5.c @@ -1268,7 +1268,7 @@ struct mlx5_flow_id_pool * * @param dev * Pointer to Ethernet device structure. */ -static void +void mlx5_proc_priv_uninit(struct rte_eth_dev *dev) { if (!dev->process_private) diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index 206c8e9..0e4a5f8 100644 --- a/drivers/net/mlx5/mlx5.h +++ b/drivers/net/mlx5/mlx5.h @@ -699,7 +699,10 @@ struct mlx5_ibv_shared { struct mlx5_ibv_shared_port port[]; /* per device port data array. */ }; -/* Per-process private structure. */ +/* + * Per-process private structure. + * Caution, secondary process may rebuild the struct during port start. + */ struct mlx5_proc_priv { size_t uar_table_sz; /* Size of UAR register table. */ @@ -799,6 +802,7 @@ int64_t mlx5_get_dbr(struct rte_eth_dev *dev, struct mlx5_devx_dbr_page **dbr_page); int32_t mlx5_release_dbr(struct rte_eth_dev *dev, uint32_t umem_id, uint64_t offset); +void mlx5_proc_priv_uninit(struct rte_eth_dev *dev); int mlx5_udp_tunnel_port_add(struct rte_eth_dev *dev, struct rte_eth_udp_tunnel *udp_tunnel); uint16_t mlx5_eth_find_next(uint16_t port_id, struct rte_pci_device *pci_dev); diff --git a/drivers/net/mlx5/mlx5_mp.c b/drivers/net/mlx5/mlx5_mp.c index 2a031e2..e889247 100644 --- a/drivers/net/mlx5/mlx5_mp.c +++ b/drivers/net/mlx5/mlx5_mp.c @@ -119,6 +119,8 @@ const struct mlx5_mp_param *param = (const struct mlx5_mp_param *)mp_msg->param; struct rte_eth_dev *dev; + struct mlx5_proc_priv *ppriv; + struct mlx5_priv *priv; int ret; assert(rte_eal_process_type() == RTE_PROC_SECONDARY); @@ -128,12 +130,27 @@ return -rte_errno; } dev = &rte_eth_devices[param->port_id]; + priv = dev->data->dev_private; switch (param->type) { case MLX5_MP_REQ_START_RXTX: DRV_LOG(INFO, "port %u starting datapath", dev->data->port_id); rte_mb(); dev->rx_pkt_burst = mlx5_select_rx_function(dev); dev->tx_pkt_burst = mlx5_select_tx_function(dev); + ppriv = (struct mlx5_proc_priv *)dev->process_private; + /* If Tx queue number changes, re-initialize UAR. */ + if (ppriv->uar_table_sz != priv->txqs_n) { + mlx5_tx_uar_uninit_secondary(dev); + mlx5_proc_priv_uninit(dev); + ret = mlx5_proc_priv_init(dev); + if (ret) + return -rte_errno; + ret = mlx5_tx_uar_init_secondary(dev, mp_msg->fds[0]); + if (ret) { + mlx5_proc_priv_uninit(dev); + return -rte_errno; + } + } mp_init_msg(dev, &mp_res, param->type); res->result = 0; ret = rte_mp_reply(&mp_res, peer); @@ -172,6 +189,7 @@ struct rte_mp_reply mp_rep; struct mlx5_mp_param *res; struct timespec ts = {.tv_sec = MLX5_MP_REQ_TIMEOUT_SEC, .tv_nsec = 0}; + struct mlx5_priv *priv = dev->data->dev_private; int ret; int i; @@ -184,6 +202,10 @@ return; } mp_init_msg(dev, &mp_req, type); + if (type == MLX5_MP_REQ_START_RXTX) { + mp_req.num_fds = 1; + mp_req.fds[0] = ((struct ibv_context *)priv->sh->ctx)->cmd_fd; + } ret = rte_mp_request_sync(&mp_req, &mp_rep, &ts); if (ret) { if (rte_errno != ENOTSUP) -- 1.8.3.1