From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2BEF4A0558 for ; Thu, 9 Jun 2022 10:42:49 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 211DF427EC; Thu, 9 Jun 2022 10:42:49 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mails.dpdk.org (Postfix) with ESMTP id 6CBF940220; Thu, 9 Jun 2022 10:42:46 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1654764166; x=1686300166; h=from:to:cc:subject:date:message-id; bh=Mv2kKOPfULb+VEDWoFquCADVab76Uvah1SYwuos0Qto=; b=g/iaKX57Zr6XOI2lS79x94D6UKlsDfG7PYzZhIoHtFlJuT+B9vHrD4QD EI7TQG5tvwDabsVp8P4Yg96rSbiADHbbC6swUWJJPPw5Zg429hBZe7pzJ 79yxkR3aXe7zAn4zDlquztbiDLT35f6roKliiJSz12r5NuU3y8FWcF9Z0 zQPkL7cKu++MgxQ9uOPF6xdmqZtjPTxY8pTFIrbJX7HQ04uZ3I6ZeDS1Q BQSeYsgtl/ka7GSy0ldQmLcSwOFyqysuB2NFnOIj5hUs+ZcXlMcxL5WtX dmdHm2y7YpGPW0v2oT9+LH2G108F8qTd2zG6HNHj4EPk+vm02VrlWdXFR w==; X-IronPort-AV: E=McAfee;i="6400,9594,10372"; a="302572214" X-IronPort-AV: E=Sophos;i="5.91,287,1647327600"; d="scan'208";a="302572214" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Jun 2022 01:42:33 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,287,1647327600"; d="scan'208";a="533480191" Received: from unknown (HELO zj-fpga-amt.sh.intel.com) ([10.238.175.102]) by orsmga003.jf.intel.com with ESMTP; 09 Jun 2022 01:42:31 -0700 From: Wei Huang To: dev@dpdk.org, thomas@monjalon.net, nipun.gupta@nxp.com, hemant.agrawal@nxp.com Cc: stable@dpdk.org, rosen.xu@intel.com, tianfei.zhang@intel.com, qi.z.zhang@intel.com, Wei Huang Subject: [PATCH v1] raw/ifpga: free file handle before function return Date: Thu, 9 Jun 2022 04:50:09 -0400 Message-Id: <1654764609-8057-1-git-send-email-wei.huang@intel.com> X-Mailer: git-send-email 1.8.3.1 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Coverity issue: 379064 Fixes: 673c897f4d73 ("raw/ifpga: support OFS card probing") Signed-off-by: Wei Huang --- drivers/raw/ifpga/base/ifpga_enumerate.c | 28 +++++++++++++++++++--------- 1 file changed, 19 insertions(+), 9 deletions(-) diff --git a/drivers/raw/ifpga/base/ifpga_enumerate.c b/drivers/raw/ifpga/base/ifpga_enumerate.c index 7a5d264..61eb660 100644 --- a/drivers/raw/ifpga/base/ifpga_enumerate.c +++ b/drivers/raw/ifpga/base/ifpga_enumerate.c @@ -837,8 +837,10 @@ static int find_dfls_by_vsec(struct dfl_fpga_enum_info *info) vndr_hdr = 0; ret = pread(fd, &vndr_hdr, sizeof(vndr_hdr), voff + PCI_VNDR_HEADER); - if (ret < 0) - return -EIO; + if (ret < 0) { + ret = -EIO; + goto free_handle; + } if (PCI_VNDR_HEADER_ID(vndr_hdr) == PCI_VSEC_ID_INTEL_DFLS && pci_data->vendor_id == PCI_VENDOR_ID_INTEL) break; @@ -846,19 +848,23 @@ static int find_dfls_by_vsec(struct dfl_fpga_enum_info *info) if (!voff) { dev_debug(hw, "%s no DFL VSEC found\n", __func__); - return -ENODEV; + ret = -ENODEV; + goto free_handle; } dfl_cnt = 0; ret = pread(fd, &dfl_cnt, sizeof(dfl_cnt), voff + PCI_VNDR_DFLS_CNT); - if (ret < 0) - return -EIO; + if (ret < 0) { + ret = -EIO; + goto free_handle; + } dfl_res_off = voff + PCI_VNDR_DFLS_RES; if (dfl_res_off + (dfl_cnt * sizeof(u32)) > PCI_CFG_SPACE_EXP_SIZE) { dev_err(hw, "%s DFL VSEC too big for PCIe config space\n", __func__); - return -EINVAL; + ret = -EINVAL; + goto free_handle; } for (i = 0; i < dfl_cnt; i++, dfl_res_off += sizeof(u32)) { @@ -868,7 +874,8 @@ static int find_dfls_by_vsec(struct dfl_fpga_enum_info *info) if (bir >= PCI_MAX_RESOURCE) { dev_err(hw, "%s bad bir number %d\n", __func__, bir); - return -EINVAL; + ret = -EINVAL; + goto free_handle; } len = pci_data->region[bir].len; @@ -876,7 +883,8 @@ static int find_dfls_by_vsec(struct dfl_fpga_enum_info *info) if (offset >= len) { dev_err(hw, "%s bad offset %u >= %"PRIu64"\n", __func__, offset, len); - return -EINVAL; + ret = -EINVAL; + goto free_handle; } dev_debug(hw, "%s BAR %d offset 0x%x\n", __func__, bir, offset); @@ -886,7 +894,9 @@ static int find_dfls_by_vsec(struct dfl_fpga_enum_info *info) dfl_fpga_enum_info_add_dfl(info, start, len, addr); } - return 0; +free_handle: + close(fd); + return ret; } /* default method of finding dfls starting at offset 0 of bar 0 */ -- 1.8.3.1