From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-f65.google.com (mail-wm0-f65.google.com [74.125.82.65]) by dpdk.org (Postfix) with ESMTP id 4582A98 for ; Tue, 24 Jul 2018 18:08:44 +0200 (CEST) Received: by mail-wm0-f65.google.com with SMTP id y9-v6so2269746wma.5 for ; Tue, 24 Jul 2018 09:08:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=+1RLYUmaobxFsMcii0YQWYVngPg5jp39FScLOxWA7QQ=; b=fZr9CGoYR7xjFdSuUEPuVQMEFva8mjDpdihNW+NhcrUTmaiivFfYCI/UoebCMtiVwp vycoaFvObZJbtxz+0x8e3G6Yfsb5tn9KQiOxmJd1pUjjYyod4a95DDZxrYSDM2XZeYES 8vP6rNvtEReTSkjX63fmE2jm6P0ukiigMgJ6ymz/NsyGUGejXs5KW1QnkH+Y/mFX22Eg fn50HpobNG8X9e8X1y4vbOWKpvWfeGG64zjEjz9wyY8NrqaWGWjLY9/hwEB5r3cPqp3k ZKQRilsMXeTjldLy0btU/fmjHkxHglXLI3MRvtFSi5k5y4yn2M6rZohX7V5aSKj+nmB4 zMVw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=+1RLYUmaobxFsMcii0YQWYVngPg5jp39FScLOxWA7QQ=; b=nxa6nuZ0pjhilF03O9hxw+5wtQ1dW/+X+M90SAew2GUWzL1IlybGSwca2O5J293XN/ fie8u73WHLRL8OoMlwiAfdiatnRB2WxHO+/Qf7Zmfdy8sgRrAK2TRgc1sKCFQPb+CZ+s jVnT1b96R3D0mNNsSPkYtgS1ew/da2ipdaC+4ODjacugZhiBKGZLfdVu2LrLmYxAisV9 h+oTJfGaG8hg+qr6AqW2qzeeNtKfB7i+cFxYOJJGVsERI5wUBXPS5PEV6fQy9Dws2idw qSVOjrTnvELGTHFpz99q4SQZtYiVMgtXgBxnzr1aLnwCij1cmLs49xN2nG0GpjOUPogt w4Jw== X-Gm-Message-State: AOUpUlGccmgfv3Zm7gdHOTcsOK4mUKu/OgaFSF88lkJAeyBHoqpUc+/T 7GHM79hLzqVxuN1w49Lt7RbiS/P6HCY= X-Google-Smtp-Source: AAOMgpftBsEApz/gqLjAzwgfGgvZ17f+aZqEu2zIgF1GluONe9wyRXCv+E+ODOrtygtVntbGdyK11A== X-Received: by 2002:a1c:6d1c:: with SMTP id i28-v6mr2509129wmc.97.1532448524066; Tue, 24 Jul 2018 09:08:44 -0700 (PDT) Received: from localhost ([2a00:23c5:be94:4600:7b12:f8a0:fd52:f87d]) by smtp.gmail.com with ESMTPSA id v188-v6sm2630057wme.43.2018.07.24.09.08.42 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 24 Jul 2018 09:08:43 -0700 (PDT) From: luca.boccassi@gmail.com To: Beilei Xing Cc: Qi Zhang , dpdk stable Date: Tue, 24 Jul 2018 17:07:31 +0100 Message-Id: <20180724160752.20287-13-luca.boccassi@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180724160752.20287-1-luca.boccassi@gmail.com> References: <20180724160752.20287-1-luca.boccassi@gmail.com> Subject: [dpdk-stable] patch 'net/i40e: fix shifts of 32-bit value' has been queued to LTS release 16.11.8 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 24 Jul 2018 16:08:44 -0000 Hi, FYI, your patch has been queued to LTS release 16.11.8 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 07/26/18. So please shout if anyone has objections. Thanks. Luca Boccassi --- >>From a898a787de86541b1cfc96a2fbde09c4c7d9ec65 Mon Sep 17 00:00:00 2001 From: Beilei Xing Date: Wed, 23 May 2018 15:46:46 +0800 Subject: [PATCH] net/i40e: fix shifts of 32-bit value [ upstream commit bc98bf3a2d0301a17707bc04e95fc32746a397c4 ] Cppcheck reports following error, (error) Shifting 32-bit value by 36 bits is undefined behaviour According to datasheet, there's PHY type and PHY type extension in setting PHY config command, should exclude PHY type extension when setting PHY type. Fixes: 1bb8f661168d ("net/i40e: fix link down and negotiation") Signed-off-by: Beilei Xing Acked-by: Qi Zhang --- drivers/net/i40e/i40e_ethdev.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index 7e93c3e1a..d9fff5c4d 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -1747,8 +1747,8 @@ i40e_phy_conf_link(struct i40e_hw *hw, - /* To enable link, phy_type mask needs to include each type */ - for (cnt = I40E_PHY_TYPE_SGMII; cnt < I40E_PHY_TYPE_MAX; cnt++) + /* PHY type mask needs to include each type except PHY type extension */ + for (cnt = I40E_PHY_TYPE_SGMII; cnt < I40E_PHY_TYPE_25GBASE_KR; cnt++) phy_type_mask |= 1 << cnt; /* use get_phy_abilities_resp value for the rest */ -- 2.18.0