From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-f65.google.com (mail-wm0-f65.google.com [74.125.82.65]) by dpdk.org (Postfix) with ESMTP id BDD2D3195 for ; Tue, 24 Jul 2018 18:08:49 +0200 (CEST) Received: by mail-wm0-f65.google.com with SMTP id t25-v6so3074067wmi.3 for ; Tue, 24 Jul 2018 09:08:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=P2WiBiN4NJnbo4r8moL3OW++LvmlAEI+OyFxLnnWLMU=; b=HWmZwrN94vt/Znjas2bLP2onQNP6K5OvDCOxV5hvYI+hpZtEwPDkmeYkTvP5Cqc2k2 TxoaRyNxbROo7A3smYQAUpV+9OiEnrD3DGHf+qQjAdNe1D2ycsjF3N3LA0kQpa34sofo tZ4zRexIS6Oirq4ywFH/YbKo+dk3Ztn+Scfg08spDKc05A6ygIKpUC89HzroKMyn+xSQ UK9ugarD7DD+VgG7H4zBcsUd+uiUcyzdtwX9LTwxlIwfJ+Si3arjJJupZ8NcQlxQ3bln laN0+ChuOHGSiWqY5S4wZ6yQ+uufCrar9GcoupP1qgxIFJYlslEOAPW5Sq4N8LLptzrO pgug== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=P2WiBiN4NJnbo4r8moL3OW++LvmlAEI+OyFxLnnWLMU=; b=s9XfS7Faj1e9dzwwafUQnZ1cBbzk9JmSR7SgDBm6298KGzq4Yt/AEbEi3SMock5e00 Glav200s8sZJNyUkIle1IYR2PQXHmKu3r/t8WyKpB4SkrBG9UupBpDZf35Fy50pc0t9v PhTK8WAXmjjROyrTSaxsxeBBzu8p+z2+9Q+gfEUK662SL0knpp+YnmvAuOQ624ojg3jU TF7QLsMDl10f69oAN92fEEVnR/UMEtFZXxv7liqcaKJTmLczNAwqNZ/3sHfhCdm86WpQ 03eOMoj12Ml2jIAoyN3mo7gk9rcYebYdVchoClvDaac0JWV72B7qWbs4W7pR92cSWfEE 1k2Q== X-Gm-Message-State: AOUpUlFoCDWNE40td0B+NHkj3kg6XwLbIW1pQX+HFS6zgL68OE+nWXlm kcLgL58IVrkVzwA4imbok7cEdt24suY= X-Google-Smtp-Source: AAOMgpd4ck+r92suB76fLIV97OpHl0CjeAeBnt1OIrlkqMW2J4o2Wvf/NnnF5FBAZ9O7aouB9kgMaQ== X-Received: by 2002:a1c:c7cb:: with SMTP id x194-v6mr2451379wmf.117.1532448529508; Tue, 24 Jul 2018 09:08:49 -0700 (PDT) Received: from localhost ([2a00:23c5:be94:4600:7b12:f8a0:fd52:f87d]) by smtp.gmail.com with ESMTPSA id o13-v6sm2338052wmc.33.2018.07.24.09.08.48 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 24 Jul 2018 09:08:48 -0700 (PDT) From: luca.boccassi@gmail.com To: Haiyue Wang Cc: Qi Zhang , dpdk stable Date: Tue, 24 Jul 2018 17:07:33 +0100 Message-Id: <20180724160752.20287-15-luca.boccassi@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180724160752.20287-1-luca.boccassi@gmail.com> References: <20180724160752.20287-1-luca.boccassi@gmail.com> Subject: [dpdk-stable] patch 'net/i40e: workaround performance degradation' has been queued to LTS release 16.11.8 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 24 Jul 2018 16:08:49 -0000 Hi, FYI, your patch has been queued to LTS release 16.11.8 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 07/26/18. So please shout if anyone has objections. Thanks. Luca Boccassi --- >>From 2d5a7c1f330815a74a86cf64257631e1b2b3be53 Mon Sep 17 00:00:00 2001 From: Haiyue Wang Date: Wed, 13 Jun 2018 13:52:41 +0800 Subject: [PATCH] net/i40e: workaround performance degradation [ upstream commit 3320d4a240daab15559d3e671bd44573a89cf017 ] The GL_SWR_PM_UP_THR value is not impacted from the link speed, its value is set according to the total number of ports for a better pipe-monitor configuration. All bellowing relevant device IDs are considered (NICs, LOMs, Mezz and Backplane): Device-ID Value Comments 0x1572 0x03030303 10G SFI 0x1581 0x03030303 10G Backplane 0x1586 0x03030303 10G BaseT 0x1589 0x03030303 10G BaseT (FortPond) 0x1580 0x06060606 40G Backplane 0x1583 0x06060606 2x40G QSFP 0x1584 0x06060606 1x40G QSFP 0x1587 0x06060606 20G Backplane (HP) 0x1588 0x06060606 20G KR2 (HP) 0x158A 0x06060606 25G Backplane 0x158B 0x06060606 25G SFP28 Fixes: c9223a2bf53c ("i40e: workaround for XL710 performance") Fixes: 75d133dd3296 ("net/i40e: enable 25G device") Signed-off-by: Haiyue Wang Acked-by: Qi Zhang --- drivers/net/i40e/i40e_ethdev.c | 71 ++++++++++++++++++++++++++++++---- 1 file changed, 64 insertions(+), 7 deletions(-) diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index d9fff5c4d..2eeb472d0 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -8669,6 +8669,60 @@ i40e_pctype_to_flowtype(enum i40e_filter_pctype pctype) #define I40E_GL_SWR_PM_UP_THR_SF_VALUE 0x06060606 #define I40E_GL_SWR_PM_UP_THR 0x269FBC +/* + * GL_SWR_PM_UP_THR: + * The value is not impacted from the link speed, its value is set according + * to the total number of ports for a better pipe-monitor configuration. + */ +static bool +i40e_get_swr_pm_cfg(struct i40e_hw *hw, uint32_t *value) +{ +#define I40E_GL_SWR_PM_EF_DEVICE(dev) \ + .device_id = (dev), \ + .val = I40E_GL_SWR_PM_UP_THR_EF_VALUE + +#define I40E_GL_SWR_PM_SF_DEVICE(dev) \ + .device_id = (dev), \ + .val = I40E_GL_SWR_PM_UP_THR_SF_VALUE + + static const struct { + uint16_t device_id; + uint32_t val; + } swr_pm_table[] = { + { I40E_GL_SWR_PM_EF_DEVICE(I40E_DEV_ID_SFP_XL710) }, + { I40E_GL_SWR_PM_EF_DEVICE(I40E_DEV_ID_KX_C) }, + { I40E_GL_SWR_PM_EF_DEVICE(I40E_DEV_ID_10G_BASE_T) }, + { I40E_GL_SWR_PM_EF_DEVICE(I40E_DEV_ID_10G_BASE_T4) }, + + { I40E_GL_SWR_PM_SF_DEVICE(I40E_DEV_ID_KX_B) }, + { I40E_GL_SWR_PM_SF_DEVICE(I40E_DEV_ID_QSFP_A) }, + { I40E_GL_SWR_PM_SF_DEVICE(I40E_DEV_ID_QSFP_B) }, + { I40E_GL_SWR_PM_SF_DEVICE(I40E_DEV_ID_20G_KR2) }, + { I40E_GL_SWR_PM_SF_DEVICE(I40E_DEV_ID_20G_KR2_A) }, + { I40E_GL_SWR_PM_SF_DEVICE(I40E_DEV_ID_25G_B) }, + { I40E_GL_SWR_PM_SF_DEVICE(I40E_DEV_ID_25G_SFP28) }, + }; + uint32_t i; + + if (value == NULL) { + PMD_DRV_LOG(ERR, "value is NULL"); + return false; + } + + for (i = 0; i < RTE_DIM(swr_pm_table); i++) { + if (hw->device_id == swr_pm_table[i].device_id) { + *value = swr_pm_table[i].val; + + PMD_DRV_LOG(DEBUG, "Device 0x%x with GL_SWR_PM_UP_THR " + "value - 0x%08x", + hw->device_id, *value); + return true; + } + } + + return false; +} + static int i40e_dev_sync_phy_type(struct i40e_hw *hw) { @@ -8724,13 +8778,16 @@ i40e_configure_registers(struct i40e_hw *hw) } if (reg_table[i].addr == I40E_GL_SWR_PM_UP_THR) { - if (I40E_PHY_TYPE_SUPPORT_40G(hw->phy.phy_types) || /* For XL710 */ - I40E_PHY_TYPE_SUPPORT_25G(hw->phy.phy_types)) /* For XXV710 */ - reg_table[i].val = - I40E_GL_SWR_PM_UP_THR_SF_VALUE; - else /* For X710 */ - reg_table[i].val = - I40E_GL_SWR_PM_UP_THR_EF_VALUE; + uint32_t cfg_val; + + if (!i40e_get_swr_pm_cfg(hw, &cfg_val)) { + PMD_DRV_LOG(DEBUG, "Device 0x%x skips " + "GL_SWR_PM_UP_THR value fixup", + hw->device_id); + continue; + } + + reg_table[i].val = cfg_val; } ret = i40e_aq_debug_read_register(hw, reg_table[i].addr, -- 2.18.0